ECC_C_TRAP
ecc->flt_status = ECC_C_TRAP;
C_AFSR_EDU, "EDU ", ECC_C_TRAP, CPU_UE_ECACHE_RETIRE,
C_AFSR_WDU, "WDU ", ECC_C_TRAP, CPU_UE_ECACHE_RETIRE,
C_AFSR_CPU, "CPU ", ECC_C_TRAP, CPU_UE_ECACHE,
C_AFSR_CE, "CE ", ECC_C_TRAP, CPU_CE,
C_AFSR_EDC, "EDC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_EMC, "EMC ", ECC_C_TRAP, CPU_EMC,
C_AFSR_WDC, "WDC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_CPC, "CPC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_IVU, "IVU ", ECC_C_TRAP, CPU_IV,
C_AFSR_IVC, "IVC ", ECC_C_TRAP, CPU_IV,
C_AFSR_L3_TUE_SH, "L3_TUE_SH ", ECC_C_TRAP,
C_AFSR_L3_TUE, "L3_TUE ", ECC_C_TRAP,
C_AFSR_TUE_SH, "TUE_SH ", ECC_C_TRAP,
C_AFSR_IMU, "IMU ", ECC_C_TRAP,
C_AFSR_L3_EDU, "L3_EDU ", ECC_C_TRAP,
C_AFSR_L3_WDU, "L3_WDU ", ECC_C_TRAP,
C_AFSR_L3_CPU, "L3_CPU ", ECC_C_TRAP,
C_AFSR_EDU, "EDU ", ECC_C_TRAP,
C_AFSR_WDU, "WDU ", ECC_C_TRAP,
C_AFSR_CPU, "CPU ", ECC_C_TRAP,
C_AFSR_DUE, "DUE ", ECC_C_TRAP,
C_AFSR_CE, "CE ", ECC_C_TRAP,
C_AFSR_L3_EDC, "L3_EDC ", ECC_C_TRAP,
C_AFSR_EDC, "EDC ", ECC_C_TRAP,
C_AFSR_EMC, "EMC ", ECC_C_TRAP,
C_AFSR_L3_WDC, "L3_WDC ", ECC_C_TRAP,
C_AFSR_L3_CPC, "L3_CPC ", ECC_C_TRAP,
C_AFSR_L3_THCE, "L3_THCE ", ECC_C_TRAP,
C_AFSR_WDC, "WDC ", ECC_C_TRAP,
C_AFSR_CPC, "CPC ", ECC_C_TRAP,
C_AFSR_THCE, "THCE ", ECC_C_TRAP,
C_AFSR_DTO, "DTO ", ECC_C_TRAP,
C_AFSR_DBERR, "DBERR ", ECC_C_TRAP,
C_AFSR_IVU, "IVU ", ECC_C_TRAP,
C_AFSR_IVC, "IVC ", ECC_C_TRAP,
C_AFSR_IMC, "IMC ", ECC_C_TRAP,
cpu_check_cpu_logout(i, NULL, 0, ECC_C_TRAP,
if ((aflt->flt_status & ECC_C_TRAP) &&
if (aflt->flt_status & ECC_C_TRAP)
aflt->flt_status = ECC_C_TRAP;
C_AFSR_EDU, "EDU ", ECC_C_TRAP, CPU_UE_ECACHE_RETIRE,
C_AFSR_WDU, "WDU ", ECC_C_TRAP, CPU_UE_ECACHE_RETIRE,
C_AFSR_CPU, "CPU ", ECC_C_TRAP, CPU_UE_ECACHE,
C_AFSR_WBP, "WBP ", ECC_C_TRAP, CPU_BPAR,
C_AFSR_RCE, "RCE ", ECC_C_TRAP, CPU_RCE,
C_AFSR_CE, "CE ", ECC_C_TRAP, CPU_CE,
C_AFSR_EDC, "EDC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_WDC, "WDC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_CPC, "CPC ", ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_ETI, "ETI", ECC_F_TRAP | ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_ETC, "ETC", ECC_F_TRAP | ECC_C_TRAP, CPU_CE_ECACHE,
C_AFSR_UMS, "UMS ", ECC_C_TRAP, CPU_UMS,
C_AFSR_FRC, "FRC ", ECC_C_TRAP, CPU_FRC,
C_AFSR_FRU, "FRU ", ECC_C_TRAP, CPU_FRU,
C_AFSR_IVPE, "IVPE ", ECC_C_TRAP, CPU_IV,
#define ECC_ALL_TRAPS (ECC_D_TRAP | ECC_I_TRAP | ECC_C_TRAP | ECC_F_TRAP)
#define ECC_ORPH_TRAPS (ECC_D_TRAP | ECC_I_TRAP | ECC_C_TRAP)
#define ECC_MECC_TRAPS (ECC_D_TRAP | ECC_C_TRAP | ECC_F_TRAP)