DbgBreakMsg
DbgBreakMsg("Unsupported chip.\n");
DbgBreakMsg("Unsupported chip.\n");
DbgBreakMsg("Invalid mac address index.\n");
DbgBreakMsg("Unsupported type.\n");
DbgBreakMsg("Unknown flash/EEPROM type.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Cannot get access to nvram interface.\n");
DbgBreakMsg("unknown forced speed.\n");
DbgBreakMsg("Read phy register failed\n");
DbgBreakMsg("Not loopback medium type.\n");
DbgBreakMsg("unable to determine autoneg speed.\n");
DbgBreakMsg("unknown link speed status.\n");
DbgBreakMsg("unknown speed.\n");
DbgBreakMsg("Write phy register failed\n");
DbgBreakMsg("Unknown interrupt mode\n");
DbgBreakMsg("Not supported page size.\n");
DbgBreakMsg("Invalid phy_int_mode.\n");
DbgBreakMsg("### Invalid chip number.\n");
DbgBreakMsg("invalid reason code.\n");
DbgBreakMsg("Shmem signature not present.\n");
DbgBreakMsg("invalid xinan tx index.\n");
DbgBreakMsg("invalid teton rx index.\n");
DbgBreakMsg("invalid xinan rx index.\n");
DbgBreakMsg("invalid user index.\n");
DbgBreakMsg("Unknown rx_mask.\n");
DbgBreakMsg("invalid user idx.\n");
DbgBreakMsg("No entry in MC table\n");
DbgBreakMsg("Mc address not in the table\n");
DbgBreakMsg("Invalid byte mask size\n");
DbgBreakMsg("Invalid byte mask size\n");
DbgBreakMsg("Invalid abort.\n");
DbgBreakMsg("not a valid fw event.\n");
DbgBreakMsg("invalid l2 kcqe.\n");
DbgBreakMsg("MEM_SPACE not enabled.\n");
DbgBreakMsg("Invalid bar size.\n");
DbgBreakMsg("Bad CRC32 in rx packet.\n");
DbgBreakMsg("Bad CRC32 in rx packet.\n");
DbgBreakMsg("zero frag_cnt\n");
DbgBreakMsg("No tx bd left.\n");
DbgBreakMsg("zero frag_cnt\n");
DbgBreakMsg("No tx bd left.\n");
#define BUG() DbgBreakMsg("Bug")
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)
DbgBreakMsg("Reached searcher hash limit\n");
DbgBreakMsg("Invalid Parameters") ;
DbgBreakMsg("lm_dcbx_fill_cos_params : Invalid value for pri_join_mask could not find a priority \n");
DbgBreakMsg("lm_dcbx_fill_cos_params :Wrong pg_help_data->num_of_pg \n");
DbgBreakMsg("lm_dcbx_spread_strict_pri- This is a bug ");
DbgBreakMsg("lm_dcbx_cee_e3b0_fill_cos_params :Wrong pg_help_data->num_of_pg \n");
DbgBreakMsg(" Wrong ETS settings ");
DbgBreakMsg("lm_dcbx_get_ets_ieee_feature parameters are check before "
DbgBreakMsg(" lm_dcbx_ie_admin_mib_updated_runtime lm_dcbx_read_admin_mib failed ");
DbgBreakMsg("lm_pfc_fw_struct_e2:pfc_fw_cfg_virt was not allocated DCBX should have been disabled ");
DbgBreakMsg("lm_get_dcbx_drv_param wrong in parameters ");
DbgBreakMsg("lm_dcbx_read_remote_local_mib DCBX Negotiation result not supported");
DbgBreakMsg("lm_dcbx_read_remote_local_mib DCBX Negotiation result not supported");
DbgBreakMsg("prefix_seq_num doesnt equal suffix_seq_num for to much time");
DbgBreakMsg("lm_dcbx_read_remote_local_mib DCBX Negotiation result not supported");
DbgBreakMsg("lm_dcbx_read_local_mib_fields : prefix_seq_num doesnt equal suffix_seq_num for to much time");
DbgBreakMsg("lm_dcbx_update_lpme_set_params error");
DbgBreakMsg("lm_dcbx_update_lpme_set_params error");
DbgBreakMsg("lm_dcbx_set_params: couldn't read local_mib");
DbgBreakMsg("lm_dcbx_update_lpme_set_params error");
DbgBreakMsg("DCBX DCBX params supported");
DbgBreakMsg("DCBX DCBX stats supported");
DbgBreakMsg("DCBX DCBX params not supported");
DbgBreakMsg("DCBX Negotiation result not supported");
DbgBreakMsg("DCBX remote MIB not supported");
DbgBreakMsg("DCBX statistic not supported");
DbgBreakMsg("lm_dcbx_admin_mib_update_app_pri illegal traffic_type entry ");
DbgBreakMsg("lm_dcbx_admin_mib_update_app_pri : traf_type_entry contains an invalid value ");
DbgBreakMsg("lm_dcbx_ie_admin_mib_update_runtime_classif illegal action field");
DbgBreakMsg("lm_dcbx_runtime_params_updated_en_classif_entries: illegal entry ");
DbgBreakMsg("lm_dcbx_get_ets_ieee_feature parameters are check before "
DbgBreakMsg("lm_dcbx_read_admin_mib couldn't read mcp offset ");
DbgBreakMsg("lm_dcbx_read_admin_mib: lm_dcbx_get_admin_mib_offset failed ");
DbgBreakMsg("lm_dcbx_ie_admin_mib_update_runtime_ets function failed ");
DbgBreakMsg("lm_dcbx_ie_admin_mib_update_runtime_ets function failed ");
DbgBreakMsg("lm_dcbx_ie_admin_mib_update_runtime_classif function failed ");
DbgBreakMsg(" lm_dcbx_admin_mib_updated_init lm_dcbx_read_admin_mib failed ");
DbgBreakMsg(" lm_dcbx_admin_mib_updated_init lm_dcbx_read_admin_mib failed ");
DbgBreakMsg("lm_dcbx_init_params : resource ");
DbgBreakMsg("lm_dcbx_check_drv_flags error only PMF can access this field ");
DbgBreakMsg("lm_dcbx_set_comp_recv_on_port_bit lm_hw_lock failed ");
DbgBreakMsg("lm_dcbx_set_comp_recv_on_port_bit : illegal drv_flags_cmd ");
DbgBreakMsg("lm_dcbx_check_drv_flags error only PMF can access this field ");
DbgBreakMsg("lm_dcbx_init : lm_mcp_cmd_send_recieve failed ");
DbgBreakMsg("lm_dcbx_int : The chip QM queues are stuck until an interrupt from MCP");
DbgBreakMsg("lm_dcbx_init : lm_mcp_cmd_send_recieve failed ");
DbgBreakMsg("lm_dcbx_int : The chip QM queues are stuck until an interrupt from MCP");
DbgBreakMsg("lm_dcbx_update_ets_params: elinc_ets_strict failed ");
DbgBreakMsg("lm_dcbx_update_lpme_set_params error");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_pfc called but is_indicate_event_en is false");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_ets num_traffic_classes can't be larger"
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_ets a tc_entry can't be larger"
DbgBreakMsg("TSA_ASSIGNMENT_DCB_TSA_CBS value isn't supported by VBD");
DbgBreakMsg("illegal value for tsa_assignment_table");
DbgBreakMsg("OS gave more TC than mentioned in num_traffic_classes");
DbgBreakMsg("lm_dcbx_runtime_params_updated_en_classif_entries : classif_version not supported ");
DbgBreakMsg("lm_dcbx_runtime_params_updated_en_classif_entries : p_classif_elem is null ");
DbgBreakMsg("lm_dcbx_update_ets_e3b0_params :COS can't be not BW and not SP");
DbgBreakMsg("lm_dcbx_runtime_params_updated_en_classif_entries: illegal entry ");
DbgBreakMsg(" lm_dcbx_ie_copy_alloc_classif_buffer allocation failure ");
DbgBreakMsg("lm_dcbx_update_ets_e3b0_params :COS can't be not BW and not SP");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_pfc called but is_indicate_event_en is false");
DbgBreakMsg("lm_dcbx_update_ets_e3b0_params: ets_e3b0_config failed ");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_ets a tc_entry can't be larger"
DbgBreakMsg("lm_dcbx_ie_ets_cee_to_ieee_unparse: this is a bug we cant have 9 TC");
DbgBreakMsg("lm_dcbx_update_ets_params the function elink_ets_disabled failed");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_ets a tc_entry can't be larger"
DbgBreakMsg("lm_dcbx_classif_cee_to_ieee invalid appBitfield ");
DbgBreakMsg("lm_dcbx_ie_classif_parse_cee_arrray invalid pri for valid entry ");
DbgBreakMsg("lm_dcbx_ie_classif_parse_cee_arrray invalid pri for valid entry ");
DbgBreakMsg("lm_dcbx_runtime_params_updated_en_classif_entries: illegal entry ");
DbgBreakMsg("lm_get_dcbx_drv_param wrong in parameters ");
DbgBreakMsg("lm_dcbx_int : The chip QM queues are stuck until an interrupt from MCP");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_pfc called but is_indicate_event_en is false");
DbgBreakMsg("lm_dcbx_runtime_params_updated_validate_pfc called but is_indicate_event_en is false");
DbgBreakMsg("lm_dcbx_ie_alloc_bind_structs allocation failed remote ");
DbgBreakMsg("lm_dcbx_ie_alloc_bind_structs allocation failed local ");
DbgBreakMsg("lm_dcbx_ie_alloc_bind_structs allocation failed given DBG");
DbgBreakMsg("illegal value for dcbx_update_lpme_task_state");
DbgBreakMsg("lm_dcbx_join_pg_data required_num_of_pg can't be zero");
DbgBreakMsg("invalid cos");
DbgBreakMsg("Unknown chip version");
DbgBreakMsg(" Unknown extended mf mode\n");
DbgBreakMsg(" Unknown mf mode\n");
DbgBreakMsg("Zero isn't a valid value for pdev->params.max_rss_chains ");
DbgBreakMsg("BAR 0 must be present\n");
DbgBreakMsg("BAR 0 must be present\n");
DbgBreakMsg("VF Can't work in GRC Access mode!\n");
DbgBreakMsg("Unknown context mode.\n");
DbgBreakMsg("Unknown address type.\n");
DbgBreakMsg("Unknown address type.\n");
DbgBreakMsg("Invalid DMAE user index.\n");
DbgBreakMsg("Failed to acquire spinlock.\n");
DbgBreakMsg("Failed to acquire HW lock.\n");
DbgBreakMsg("Failed to roll-back after locking failure.\n");
DbgBreakMsg("Failed to release HW lock.\n");
DbgBreakMsg("Failed to release spinlock.\n");
DbgBreakMsg("Failed to roll-back after release failure.\n"); //This is a double-fault. Don't try to recover.
DbgBreakMsg("the intermediate buffer can be used for source or destination but not both.\n");
DbgBreakMsg("the intermediate buffer can be used for source or destination but not both.\n");
DbgBreakMsg("Too many SGEs in DMAE operation");
DbgBreakMsg("Unable to clean up after a DMAE error. DMAE context is unusable.\n");
DbgBreakMsg("Failed to acquire context.\n");
DbgBreakMsg("DMAE execution failed.\n");
DbgBreakMsg("lm_dmae_command: Trying to write/read to NULL address\n");
DbgBreakMsg("Unknown source address type for DMAE operation.\n");
DbgBreakMsg("Unknown destination address type for DMAE operation.\n");
DbgBreakMsg("HW lock for resource does not exist.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to release HW Recovery Counter lock.\n");
DbgBreakMsg("Failed to acquire HW Recovery Counter lock.\n");
DbgBreakMsg("lm_hw_lock: LM_STATUS_INVALID_PARAMETER\n");
DbgBreakMsg("lm_hw_lock: LM_STATUS_EXISTING_OBJECT\n");
DbgBreakMsg("lm_hw_lock: FAILED LM_STATUS_TIMEOUT\n");
DbgBreakMsg("lm_hw_unlock: LM_STATUS_INVALID_PARAMETER\n");
DbgBreakMsg("lm_hw_unlock: LM_STATUS_OBJECT_NOT_FOUND\n");
DbgBreakMsg("Invalid MF mode.");
DbgBreakMsg("Unknown Cos Mode");
DbgBreakMsg("lm_mcp_cmd_init failed!\n");
DbgBreakMsg("ECORE_GUNZIP NOT IMPLEMENTED\n");
DbgBreakMsg("We should not reach this line\n");
DbgBreakMsg("lm_reset_device_if_undi_active: reading from shmem when MCP is not present\n");
DbgBreakMsg("we should not reach this line!");
DbgBreakMsg("mcp_cmd_send_and_recieve: mcp_cmd_send failed!\n");
DbgBreakMsg("mcp_cmd_send_and_recieve: mcp_cmd_response failed!\n");
DbgBreakMsg("Invalid client type");
DbgBreakMsg("Cannot get access to nvram interface.\n");
DbgBreakMsg("Invalid PORT_ID/FUNC_ID\n");
DbgBreakMsg("Please upgrade the bootcode version.\n");
DbgBreakMsg("lm_niv_cli_update failed ");
DbgBreakMsg("lm_niv_cli_update failed ");
DbgBreakMsg("Failed to clear VIF lists on VIF delete.\n");
DbgBreakMsg("Failed to disable VIF on VIF delete.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Invalid paramter.\n");
DbgBreakMsg("Failed to write to NVM! Attemp to write to offset larger than NVM total size !\n");
DbgBreakMsg("Cannot get access to nvram interface.\n");
DbgBreakMsg("Write phy register failed\n");
DbgBreakMsg("Read phy register failed\n");
DbgBreakMsg("lm_set_phy_addr: error addr not valid\n");
DbgBreakMsg("Invalid index\n") ;
DbgBreakMsg("Invalid byte mask size\n");
DbgBreakMsg("Invalid crc32\n") ;
DbgBreakMsg("Invalid byte mask size\n");
DbgBreakMsg("CQE type not supported");
DbgBreakMsg(" invalid chain ");
DbgBreakMsg(" Illegal TPA params");
DbgBreakMsg(" lm_init_client_con lm_cli_idx has an invalid value");
DbgBreakMsg(" Packet is null suppose to be null");
DbgBreakMsg("VBD didn't return all packets this chain ");
DbgBreakMsg("VBD didn't return all packets this chain ");
DbgBreakMsg("unknown abort operation.\n");
DbgBreakMsg("Memory allocation out of sync\n");
DbgBreakMsg("OOO doesn't have a txq");
DbgBreakMsg(" invalid chain ");
DbgBreakMsg(" Invalid TX chain index ");
DbgBreakMsg(" Invalid RX chain index ");
DbgBreakMsg("Wrong Interrupt Mode\n");
DbgBreakMsg("Wrong Interrupt Mode\n");
DbgBreakMsg("Invalid cos");
DbgBreakMsg(" Ramrod send failed ");
DbgBreakMsg("lm_empty_ramrod_eth: lm_wait_state_change failed");
DbgBreakMsg("Unknwon ecore_status_t");
DbgBreakMsg("lm_set_mac_addr: invalid params\n");
DbgBreakMsg("lm_move_mac_addr: invalid params\n");
DbgBreakMsg("lm_move_mac_addr: Move not expected on VF\n");
DbgBreakMsg("lm_eth_init_client_init_general_data failed ");
DbgBreakMsg(" lm_cli_idx has an invalid value");
DbgBreakMsg("size must be greater than zero for a valid client\n");
DbgBreakMsg(" lm_eq_handle_mcast_eqe lm_cli_idx is invalid ");
DbgBreakMsg("Unexpected pending mcast command failed\n");
DbgBreakMsg("lm_eq_handle_function_update_eqe unknown source");
DbgBreakMsg("lm_eq_handle_vf_flr_eqe: vf_info is not found\n");
DbgBreakMsg("Unknown elem type received on eq\n");
DbgBreakMsg("Unknown elem type received on eq\n");
DbgBreakMsg("Unknown elem type received on eq\n");
DbgBreakMsg("unsupported pending sq: Not implemented yet\n");
DbgBreakMsg("lm_sq_complete pending is NULL");
DbgBreakMsg("Unknown cmd");
DbgBreakMsg("lm_move_mac_addr: invalid params\n");
DbgBreakMsg("lm_eth_init_tx_queue_data: the chain isn't TX only " );
DbgBreakMsg("lm_establish_eth_con: lm_eth_init_client_init_data or lm_eth_init_tx_queue_data failed \n ");
DbgBreakMsg(" lm_establish_eth_con: cmd_id not set ");
DbgBreakMsg(" Ramrod send failed ");
DbgBreakMsg("lm_tpa_send_ramrod : invalid paramters");
DbgBreakMsg("Failed to initialize EMAC stats DMAE operation.\n");
DbgBreakMsg("Failed to initialize NIG stats DMAE operation.\n");
DbgBreakMsg("Failed to initialize non-EMAC stats DMAE operation.\n");
DbgBreakMsg("Failed to initialize NIG stats DMAE operation.\n");
DbgBreakMsg( "mac_type not acceptable" ) ;
DbgBreakMsg( "mac_type not acceptable\n" ) ;
DbgBreakMsg("num is larger than num_bits_supported");
DbgBreakMsg("lm_set_virt_mode pdev is null");
DbgBreakMsg("lm_set_virt_channel_type pdev is null");
DbgBreakMsg("lm_reset_virt_mode pdev is null");
DbgBreakMsg("Received a fw GA/GAI without any generic buffers\n");
DbgBreakMsg("MichalS rcv_indication_size != 0 not implemented\n");
DbgBreakMsg("lm_tcp_rx_post_sws: Invalid operation\n");
DbgBreakMsg("Unable To Copy");
DbgBreakMsg("Unable To Copy");
DbgBreakMsg("MichalS: Currently History Count = 0 is not SUPPORTED\n");
DbgBreakMsg("Not Supported\n");
DbgBreakMsg("Illegal slow path request type!\n");
DbgBreakMsg("lm_tcp_get_delegated: Unsupported protocol type \n") ;
DbgBreakMsg("GilR - NOT IMPLEMENTED!\n");
DbgBreakMsg("Illegal slow path request type!\n");
DbgBreakMsg("Vladz: Not implemented yet!\n");
DbgBreakMsg("lm_fc_free_init_resc failed");
DbgBreakMsg("lm_sc_free_init_resc failed");
DbgBreakMsg("lm_sc_init: pdev->iscsi_info.l5_eq_chain_cnt is bigger than 1.\n");
DbgBreakMsg("lm_fc_init: pdev->fcoe_info.run_time.num_of_cqs is bigger than 1.\n");
DbgBreakMsg("lm_sc_init_sp_req_type: Illegal slow path request type!\n");
DbgBreakMsg("Illegal slow path request type!\n");
DbgBreakMsg("lm_vf_pf_channel_get_message_to_send: UNKNOWN channel type\n");
DbgBreakMsg("lm_vf_pf_channel_get_message_to_send: HW_CHANNEL is not implemented yet\n");
DbgBreakMsg("lm_vf_pf_channel_get_message_to_send: HW_CHANNEL is not implemented yet\n");
DbgBreakMsg("lm_pf_create_vf: vf_info is not found\n");
DbgBreakMsg("lm_pf_remove_vf: vf_info is not found\n");
DbgBreakMsg("lm_pf_fl_vf_reset_set_inprogress: vf_info is not found\n");
DbgBreakMsg("lm_pf_fl_vf_reset_clear_inprogress: vf_info is not found\n");
DbgBreakMsg("lm_pf_fl_vf_reset_is_inprogress: vf_info is not found\n");
DbgBreakMsg("lm_tpa_send_ramrod : invalid paramters");
DbgBreakMsg("lm_pf_init_vf_filters : invalid paramters");
DbgBreakMsg("lm_pf_allow_vf_promiscuous_mode : invalid paramters");
DbgBreakMsg("lm_pf_int_vf_igu_sb_cleanup : invalid paramters");
DbgBreakMsg("lm_pf_int_vf_igu_sb_cleanup : only available on Host/PF side");
DbgBreakMsg(" Ramrod send failed ");
DbgBreakMsg("lm_vf_pf_channel_send: UNKNOWN channel type\n");
#define DbgBreakMsgFastPath(_s) DbgBreakMsg(_s)