wr32
wr32(hw, hw->aq.arq.tail, ntc);
wr32(hw, hw->aq.asq.head, 0);
wr32(hw, hw->aq.asq.tail, 0);
wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
wr32(hw, hw->aq.arq.head, 0);
wr32(hw, hw->aq.arq.tail, 0);
wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);
wr32(hw, hw->aq.asq.head, 0);
wr32(hw, hw->aq.asq.tail, 0);
wr32(hw, hw->aq.asq.len, 0);
wr32(hw, hw->aq.asq.bal, 0);
wr32(hw, hw->aq.asq.bah, 0);
wr32(hw, hw->aq.arq.head, 0);
wr32(hw, hw->aq.arq.tail, 0);
wr32(hw, hw->aq.arq.len, 0);
wr32(hw, hw->aq.arq.bal, 0);
wr32(hw, hw->aq.arq.bah, 0);
wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);
wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);
wr32(hw, I40E_PFGEN_CTRL,
wr32(hw, I40E_PFINT_ICR0_ENA, 0);
wr32(hw, I40E_PFINT_DYN_CTLN(i), val);
wr32(hw, I40E_PFINT_LNKLST0, val);
wr32(hw, I40E_PFINT_LNKLSTN(i), val);
wr32(hw, I40E_VPINT_LNKLST0(i), val);
wr32(hw, I40E_VPINT_LNKLSTN(i), val);
wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val);
wr32(hw, I40E_QINT_TQCTL(i), 0);
wr32(hw, I40E_QTX_ENA(i), 0);
wr32(hw, I40E_QINT_RQCTL(i), 0);
wr32(hw, I40E_QRX_ENA(i), 0);
wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
wr32(hw, I40E_GLLAN_RCTL_0, 0x1);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, I40E_GLGEN_MSRWD(port_num), command);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, I40E_GLGEN_MSRWD(port_num), command);
wr32(hw, I40E_GLGEN_MSCA(port_num), command);
wr32(hw, reg_addr, reg_val);
wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
wr32((hw), I40E_PFHMC_SDCMD, val3); \
wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
wr32((hw), I40E_PFHMC_SDCMD, val3); \
wr32((hw), I40E_PFHMC_PDINV, \
wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
wr32(hw, I40E_GLNVM_SRCTL, sr_reg);
#define I40E_WRITE_REG wr32