usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

1095

pa = vtophys(page);

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

1242

temp->pt_base = vtophys(domain->ptp) >> 12;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

243

ctrl->cmd.base = vtophys(softc->cmd) / PAGE_SIZE;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

318

pa = vtophys(&softc->cmp_data);

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

531

ctrl->event.base = vtophys(softc->event) / PAGE_SIZE;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

710

ctrl->dte.base = vtophys(amdvi_dte) / PAGE_SIZE;

usr/src/uts/intel/io/vmm/amd/svm.c

468

iopm_pa = vtophys(svm_sc->iopm_bitmap);

usr/src/uts/intel/io/vmm/amd/svm.c

469

msrpm_pa = vtophys(svm_sc->msr_bitmap);

usr/src/uts/intel/io/vmm/amd/svm.c

476

vcpu->vmcb_pa = vtophys(&vcpu->vmcb);

usr/src/uts/intel/io/vmm/intel/vmx.c

743

apic_access_pa = vtophys(vmx->apic_access_page);

usr/src/uts/intel/io/vmm/intel/vmx.c

779

vm_paddr_t msr_bitmap_pa = vtophys(vmx->msr_bitmap[i]);

usr/src/uts/intel/io/vmm/intel/vmx.c

780

vm_paddr_t apic_page_pa = vtophys(&vmx->apic_page[i]);

usr/src/uts/intel/io/vmm/intel/vmx.c

781

vm_paddr_t pir_desc_pa = vtophys(&vmx->pir_desc[i]);

usr/src/uts/intel/io/vmm/intel/vmx.c

783

vmx->vmcs_pa[i] = (uintptr_t)vtophys(&vmx->vmcs[i]);

usr/src/uts/intel/io/vmm/intel/vmx.c

839

vtophys(&msr_load_list[0]));

usr/src/uts/intel/io/vmm/intel/vtd.c

520

ctx_paddr = vtophys(ctx_tables[i]);

usr/src/uts/intel/io/vmm/intel/vtd.c

571

vtdmap->rta = vtophys(root_table);

usr/src/uts/intel/io/vmm/intel/vtd.c

607

pt_paddr = vtophys(dom->ptp);

usr/src/uts/intel/io/vmm/intel/vtd.c

737

ptp[ptpindex] = vtophys(nlp)| VTD_PTE_RD | VTD_PTE_WR;

usr/src/uts/intel/io/vmm/sys/vmm_vm.h

110

vm_paddr_t vtophys(void *);

usr/src/uts/intel/io/vmm/vmm_sol_glue.c

204

(mod_hash_key_t)PHYS_TO_DMAP(vtophys(p)), (mod_hash_val_t)i) == 0);

usr/src/uts/intel/io/vmm/vmm_sol_glue.c

215

(mod_hash_key_t)PHYS_TO_DMAP(vtophys(addr))) == 0);