vmcs_read - Illumos

usr/src/uts/intel/io/vmm/intel/vmcs.h

68

uint64_t vmcs_read(uint32_t encoding);

usr/src/uts/intel/io/vmm/intel/vmx.c

1161

uint64_t info = vmcs_read(VMCS_ENTRY_INTR_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

1166

errcode = vmcs_read(VMCS_ENTRY_EXCEPTION_ERROR);

usr/src/uts/intel/io/vmm/intel/vmx.c

1217

ASSERT0(vmcs_read(VMCS_GUEST_INTERRUPTIBILITY) & NMI_BLOCKING);

usr/src/uts/intel/io/vmm/intel/vmx.c

1218

ASSERT0(vmcs_read(VMCS_ENTRY_INTR_INFO) & VMCS_INTR_VALID);

usr/src/uts/intel/io/vmm/intel/vmx.c

1248

gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

1249

info = vmcs_read(VMCS_ENTRY_INTR_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

1301

(vmcs_read(VMCS_GUEST_RFLAGS) & PSL_I) == 0) {

usr/src/uts/intel/io/vmm/intel/vmx.c

1355

uint16_t status_old = vmcs_read(VMCS_GUEST_INTR_STATUS);

usr/src/uts/intel/io/vmm/intel/vmx.c

1381

ASSERT0(vmcs_read(VMCS_ENTRY_INTR_INFO) & VMCS_INTR_VALID);

usr/src/uts/intel/io/vmm/intel/vmx.c

1384

if ((vmcs_read(VMCS_GUEST_INTERRUPTIBILITY) & HWINTR_BLOCKING) != 0 ||

usr/src/uts/intel/io/vmm/intel/vmx.c

1385

(vmcs_read(VMCS_GUEST_RFLAGS) & PSL_I) == 0) {

usr/src/uts/intel/io/vmm/intel/vmx.c

1453

gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

1463

gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

1473

gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

1502

!(vmcs_read(VMCS_GUEST_CR4) & CR4_XSAVE)) {

usr/src/uts/intel/io/vmm/intel/vmx.c

1572

return (vmcs_read(VMCS_GUEST_RSP));

usr/src/uts/intel/io/vmm/intel/vmx.c

1671

ctrl = vmcs_read(VMCS_ENTRY_CTLS);

usr/src/uts/intel/io/vmm/intel/vmx.c

1696

const uint64_t old = vmcs_read(VMCS_GUEST_CR0);

usr/src/uts/intel/io/vmm/intel/vmx.c

1709

efer = vmcs_read(VMCS_GUEST_IA32_EFER);

usr/src/uts/intel/io/vmm/intel/vmx.c

1773

ssar = vmcs_read(VMCS_GUEST_SS_ACCESS_RIGHTS);

usr/src/uts/intel/io/vmm/intel/vmx.c

1782

if (vmcs_read(VMCS_GUEST_IA32_EFER) & EFER_LMA) {

usr/src/uts/intel/io/vmm/intel/vmx.c

1783

csar = vmcs_read(VMCS_GUEST_CS_ACCESS_RIGHTS);

usr/src/uts/intel/io/vmm/intel/vmx.c

1788

} else if (vmcs_read(VMCS_GUEST_CR0) & CR0_PE) {

usr/src/uts/intel/io/vmm/intel/vmx.c

1799

if (!(vmcs_read(VMCS_GUEST_CR0) & CR0_PG))

usr/src/uts/intel/io/vmm/intel/vmx.c

1801

if (!(vmcs_read(VMCS_GUEST_CR4) & CR4_PAE))

usr/src/uts/intel/io/vmm/intel/vmx.c

1803

if (vmcs_read(VMCS_GUEST_IA32_EFER) & EFER_LME)

usr/src/uts/intel/io/vmm/intel/vmx.c

1812

paging->cr3 = vmcs_read(VMCS_GUEST_CR3);

usr/src/uts/intel/io/vmm/intel/vmx.c

1833

vmexit->u.mmio_emul.cs_base = vmcs_read(VMCS_GUEST_CS_BASE);

usr/src/uts/intel/io/vmm/intel/vmx.c

1838

vmexit->u.mmio_emul.cs_base = vmcs_read(VMCS_GUEST_CS_BASE);

usr/src/uts/intel/io/vmm/intel/vmx.c

1839

csar = vmcs_read(VMCS_GUEST_CS_ACCESS_RIGHTS);

usr/src/uts/intel/io/vmm/intel/vmx.c

1870

inst_info = vmcs_read(VMCS_EXIT_INSTRUCTION_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

2225

idtvec_info = vmcs_read(VMCS_IDT_VECTORING_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

2229

errcode = vmcs_read(VMCS_IDT_VECTORING_ERROR);

usr/src/uts/intel/io/vmm/intel/vmx.c

2305

vmcs_read(VMCS_IDT_VECTORING_ERROR);

usr/src/uts/intel/io/vmm/intel/vmx.c

2336

vmexit->u.hlt.rflags = vmcs_read(VMCS_GUEST_RFLAGS);

usr/src/uts/intel/io/vmm/intel/vmx.c

2365

intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

2413

intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

2479

errcode = vmcs_read(VMCS_EXIT_INTR_ERRCODE);

usr/src/uts/intel/io/vmm/intel/vmx.c

2495

gpa = vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS);

usr/src/uts/intel/io/vmm/intel/vmx.c

2508

vmcs_read(VMCS_GUEST_LINEAR_ADDRESS));

usr/src/uts/intel/io/vmm/intel/vmx.c

2637

vmexit->u.vmx.inst_error = vmcs_read(VMCS_INSTRUCTION_ERROR);

usr/src/uts/intel/io/vmm/intel/vmx.c

2667

uint32_t intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);

usr/src/uts/intel/io/vmm/intel/vmx.c

2793

ASSERT3U(vmcs_read(VMCS_GUEST_RIP), ==, rip);

usr/src/uts/intel/io/vmm/intel/vmx.c

2933

vmexit->rip = rip = vmcs_read(VMCS_GUEST_RIP);

usr/src/uts/intel/io/vmm/intel/vmx.c

2934

vmexit->inst_length = vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH);

usr/src/uts/intel/io/vmm/intel/vmx.c

2936

(vmcs_read(VMCS_EXIT_REASON) & BASIC_EXIT_REASON_MASK);

usr/src/uts/intel/io/vmm/intel/vmx.c

2938

vmcs_read(VMCS_EXIT_QUALIFICATION);

usr/src/uts/intel/io/vmm/intel/vmx.c

3102

uint64_t gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

3111

*retval = vmx_unshadow_cr0(vmcs_read(encoding),

usr/src/uts/intel/io/vmm/intel/vmx.c

3112

vmcs_read(VMCS_CR0_SHADOW));

usr/src/uts/intel/io/vmm/intel/vmx.c

3116

*retval = vmx_unshadow_cr4(vmcs_read(encoding),

usr/src/uts/intel/io/vmm/intel/vmx.c

3117

vmcs_read(VMCS_CR4_SHADOW));

usr/src/uts/intel/io/vmm/intel/vmx.c

3123

*retval = vmcs_read(encoding);

usr/src/uts/intel/io/vmm/intel/vmx.c

3159

gi = vmcs_read(VMCS_GUEST_INTERRUPTIBILITY);

usr/src/uts/intel/io/vmm/intel/vmx.c

3228

desc->base = vmcs_read(base);

usr/src/uts/intel/io/vmm/intel/vmx.c

3229

desc->limit = vmcs_read(limit);

usr/src/uts/intel/io/vmm/intel/vmx.c

3231

desc->access = vmcs_read(access);

usr/src/uts/intel/io/vmm/intel/vmx.c

3303

*valp = vmcs_read(vmcs_enc);