tg3_writephy
tg3_writephy(tp, 0x16, 0x8007);
tg3_writephy(tp, MII_BMCR, BMCR_RESET);
tg3_writephy(tp, 0x10, 0x8411);
tg3_writephy(tp, 0x11, 0x0a10);
tg3_writephy(tp, 0x18, 0x00a0);
tg3_writephy(tp, 0x16, 0x41ff);
tg3_writephy(tp, 0x13, 0x0400);
tg3_writephy(tp, 0x13, 0x0000);
tg3_writephy(tp, 0x11, 0x0a50);
tg3_writephy(tp, 0x11, 0x0a10);
tg3_writephy(tp, 0x10, 0x8011);
err = tg3_writephy(tp, MII_ADVERTISE,
err |= tg3_writephy(tp, MII_TG3_CTRL, mii_tg3_ctrl);
err |= tg3_writephy(tp, MII_BMCR,
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x201f);
err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, addr);
tg3_writephy(tp, 0x1c, 0x8d68);
tg3_writephy(tp, 0x1c, 0x8d68);
err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x7007);
tg3_writephy(tp, MII_TG3_AUX_CTRL, (val | (1 << 15) | (1 << 4)));
err = tg3_writephy(tp, MII_BMCR, phy_control);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
tg3_writephy(tp, 0x16, 0x0002);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT,
tg3_writephy(tp, 0x16, 0x0202);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
tg3_writephy(tp, 0x16, 0x0082);
tg3_writephy(tp, 0x16, 0x0802);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000b);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
tg3_writephy(tp, 0x16, 0x0002);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000);
tg3_writephy(tp, 0x16, 0x0202);
tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
tg3_writephy(tp, MII_BMCR,
tg3_writephy(tp, MII_TG3_CTRL,
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0800);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0000);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
tg3_writephy(tp, 0x16, 0x0000);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
tg3_writephy(tp, MII_TG3_CTRL, phy9_orig);
tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
tg3_writephy(tp, MII_ADVERTISE, new_adv);
tg3_writephy(tp, MII_TG3_CTRL, new_adv);
tg3_writephy(tp, MII_TG3_CTRL, 0);
tg3_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
err = tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c20);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x02);
tg3_writephy(tp, 0x15, 0x0a75);
tg3_writephy(tp, 0x1c, 0x8c68);
tg3_writephy(tp, 0x1c, 0x8d68);
tg3_writephy(tp, 0x1c, 0x8c68);
tg3_writephy(tp, MII_TG3_IMASK, ~0);
tg3_writephy(tp, MII_TG3_EXT_CTRL,
tg3_writephy(tp, MII_TG3_EXT_CTRL, 0);