shmem_region_t
((shmem_region_t volatile *)s)->bc_state.condition & CONDITION_DRV_PRESENT)
((shmem_region_t volatile *)s)->bc_state.condition & CONDITION_PORT_DISABLED)
ptr = (u32_t *)&(((shmem_region_t volatile *)p)->bc_state.state); \
sizeof(shmem_region_t)) /* 0x167c00 */
pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, drv_fw_mb.fw_mb),
OFFSETOF(shmem_region_t, drv_fw_mb.drv_mb),
OFFSETOF(shmem_region_t, drv_fw_mb.fw_mb),
OFFSETOF(shmem_region_t, dev_info.port_hw_config.config),
OFFSETOF(shmem_region_t, dev_info.port_hw_config.config),
OFFSETOF(shmem_region_t, remotephy.serdes_link_pref),
OFFSETOF(shmem_region_t, remotephy.copper_phy_link_pref),
OFFSETOF(shmem_region_t, drv_fw_mb.link_status),
OFFSETOF(shmem_region_t, drv_fw_mb.mb_args[0]),
OFFSETOF(shmem_region_t, drv_fw_mb.link_status),
OFFSETOF(shmem_region_t, drv_fw_mb.link_status),
OFFSETOF(shmem_region_t, drv_fw_mb.link_status),
OFFSETOF(shmem_region_t, dev_info.port_hw_config.config),
OFFSETOF(shmem_region_t, drv_fw_mb.fw_mb),
OFFSETOF(shmem_region_t, drv_fw_mb.drv_mb),
OFFSETOF(shmem_region_t, drv_fw_cap_mb.fw_cap_mb),
OFFSETOF(shmem_region_t, drv_fw_cap_mb.drv_ack_cap_mb),
OFFSETOF(shmem_region_t, drv_fw_mb.drv_reset_signature),
OFFSETOF(shmem_region_t, drv_fw_mb.drv_pulse_mb),
OFFSETOF(shmem_region_t, drv_fw_mb.drv_mb),
OFFSETOF(shmem_region_t, dev_info.port_hw_config.mac_upper),
OFFSETOF(shmem_region_t, dev_info.port_hw_config.mac_lower),
shmem_region_t,
shmem_region_t,
OFFSETOF(shmem_region_t, dev_info.port_hw_config.config),
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t, dev_info.signature),
pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, drv_fw_mb.fw_mb),
OFFSETOF(shmem_region_t, drv_fw_cap_mb.fw_cap_mb),
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t, fw_lic_key.max_toe_conn),
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t, fw_lic_key.max_iscsi_trgt_conn),
OFFSETOF(shmem_region_t, fw_evt_mb.fw_evt_code_mb),
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config),
offset += OFFSETOF(shmem_region_t,
offset += OFFSETOF(shmem_region_t, drv_fw_cap_mb.fw_cap_mb);
offset += OFFSETOF(shmem_region_t,
offset += OFFSETOF(shmem_region_t, drv_fw_mb.drv_pulse_mb);
OFFSETOF(shmem_region_t, dev_info.bc_rev), &val);
offset = OFFSETOF(shmem_region_t, func_mb[FUNC_MAILBOX_ID(pdev)].drv_status) ;
offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_signature);
offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_block_offset);
LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, validity_map[port]),&val);
offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_toe_conn) & 0xfffffffc;
offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_um_rdma_conn) & 0xfffffffc;
offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_iscsi_trgt_conn) & 0xfffffffc;
offset = OFFSETOF(shmem_region_t, drv_lic_key[port].max_fcoe_init_conn) & 0xfffffffc;
LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.port_feature_config[port].config), &val);
offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_signature);
offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].iscsi_boot_block_offset);
LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config),&val);
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config2),&val);
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num),&val);
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+4,&val);
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+8,&val);
OFFSETOF(shmem_region_t, dev_info.shared_hw_config.part_num)+12,&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.shared_feature_config.config),&val);
offset = pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, func_mb) + E1H_FUNC_MAX * sizeof(struct drv_func_mb);
OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].mba_config),
OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].mba_vlan_cfg),
OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].config),
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].speed_capability_mask),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].speed_capability_mask2),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].lane_config),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].link_config),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].link_config2),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].multi_phy_config),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[port].default_cfg),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].eee_power_mode),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.shared_feature_config.config),&val);
LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config_3),&val);
OFFSETOF(shmem_region_t, dev_info.port_hw_config[PORT_ID(pdev)].mac_upper),&val);
OFFSETOF(shmem_region_t, dev_info.port_hw_config[PORT_ID(pdev)].mac_lower),&val2);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].iscsi_mac_upper),&val);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].iscsi_mac_lower),&val2);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_fip_mac_upper),&val);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_fip_mac_lower),&val2);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_port_name_upper),&val);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_port_name_lower),&val2);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_node_name_upper),&val);
OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].fcoe_wwn_node_name_lower),&val2);
offset = OFFSETOF(shmem_region_t,dev_info.port_hw_config[port_idx].pf_allocation);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.bc_rev),&val);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t, validity_map[PORT_ID(pdev)]),&val);
shmem_region_t* shmem_region_dummy = NULL;
offset = OFFSETOF(shmem_region_t, dev_info.shared_hw_config.config2) ;
offset = OFFSETOF(shmem_region_t,dev_info.port_hw_config[port_id].external_phy_config);
offset = OFFSETOF(shmem_region_t, func_mb[FUNC_MAILBOX_ID(pdev)].drv_status) ;
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t,
LM_SHMEM_READ(pdev, OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].config), &val );
LM_SHMEM_WRITE(pdev, OFFSETOF(shmem_region_t,dev_info.port_feature_config[port].config), val );
validity_offset = OFFSETOF(shmem_region_t, validity_map[0]);
validity_offset = OFFSETOF(shmem_region_t, validity_map[0]);
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t,
OFFSETOF(shmem_region_t,
offset = OFFSETOF(shmem_region_t, func_mb[func_mb_id].drv_mb_header);
offset = OFFSETOF(shmem_region_t,func_mb[func_mb_id].mcp_pulse_mb) ;
offset = OFFSETOF(shmem_region_t, func_mb[func_mb_id].drv_mb_header) ;
LM_SHMEM_WRITE(pdev,OFFSETOF(shmem_region_t, func_mb[func_mb_id].drv_mb_param),param);
offset = OFFSETOF(shmem_region_t, func_mb[func_mb_id].mcp_pulse_mb) ;
offset = OFFSETOF(shmem_region_t, func_mb[func_mb_id].fw_mb_header) ;
offset = OFFSETOF(shmem_region_t, func_mb[func_mb_id].mcp_pulse_mb) ;
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].default_cfg),&port_default_cfg);
LM_SHMEM_READ(pdev,OFFSETOF(shmem_region_t,dev_info.port_hw_config[PORT_ID(pdev)].default_cfg),&default_cfg);