usr/src/test/bhyve-tests/tests/common/payload_utils.h

33

void setcr4(uint64_t);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

103

setcr4(getcr4() | CR4_OSXSAVE);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

126

setcr4(orig_cr4);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

144

setcr4(getcr4() | CR4_OSXSAVE);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

167

setcr4(orig_cr4);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

218

setcr4(getcr4() | CR4_OSXSAVE);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

62

setcr4(getcr4() & ~CR4_OSXSAVE);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

69

setcr4(getcr4() | CR4_OSXSAVE);

usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c

74

setcr4(orig_cr4);

usr/src/uts/i86pc/os/cmi_hw.c

1762

setcr4(cr4);

usr/src/uts/i86pc/os/cmi_hw.c

764

setcr4(val);

usr/src/uts/i86pc/os/mlsetup.c

372

setcr4(getcr4() & ~CR4_TSD);

usr/src/uts/i86pc/os/mlsetup.c

384

setcr4(getcr4() | CR4_DE);

usr/src/uts/i86pc/os/mlsetup.c

387

setcr4(getcr4() | CR4_SMEP);

usr/src/uts/i86pc/os/startup.c

2670

setcr4(cr4 & ~(ulong_t)CR4_PGE);

usr/src/uts/i86pc/os/startup.c

2671

setcr4(cr4);

usr/src/uts/i86pc/os/startup.c

2681

setcr4(cr4 & ~(ulong_t)CR4_PGE);

usr/src/uts/i86pc/os/startup.c

2682

setcr4(cr4);

usr/src/uts/i86pc/os/startup.c

662

setcr4(getcr4() | CR4_SMAP);

usr/src/uts/i86pc/vm/i86_mmu.c

444

setcr4(cr4 & ~(ulong_t)CR4_PGE);

usr/src/uts/i86pc/vm/i86_mmu.c

445

setcr4(cr4 | CR4_PGE);

usr/src/uts/i86pc/vm/i86_mmu.c

455

setcr4(cr4 & ~(ulong_t)CR4_PGE);

usr/src/uts/i86pc/vm/i86_mmu.c

456

setcr4(cr4 | CR4_PGE);

usr/src/uts/intel/os/cpuid.c

8036

setcr4(getcr4() | CR4_PCIDE);

usr/src/uts/intel/os/cpuid.c

8056

setcr4(getcr4() | CR4_OSXSAVE);

usr/src/uts/intel/os/fpu_subr.c

78

#define ENABLE_SSE() setcr4(CR4_ENABLE_SSE_FLAGS(getcr4()))

usr/src/uts/intel/os/fpu_subr.c

79

#define DISABLE_SSE() setcr4(CR4_DISABLE_SSE_FLAGS(getcr4()))

usr/src/uts/intel/os/hma.c

360

setcr4(getcr4() | CR4_VMXE);

usr/src/uts/intel/pcbe/core_pcbe.c

1359

setcr4(curcr4 | CR4_PCE);

usr/src/uts/intel/pcbe/core_pcbe.c

1362

setcr4(curcr4 & ~CR4_PCE);

usr/src/uts/intel/pcbe/core_pcbe.c

1445

setcr4(getcr4() & ~CR4_PCE);

usr/src/uts/intel/pcbe/opteron_pcbe.c

944

setcr4(curcr4 | CR4_PCE);

usr/src/uts/intel/pcbe/opteron_pcbe.c

946

setcr4(curcr4 & ~CR4_PCE);

usr/src/uts/intel/pcbe/opteron_pcbe.c

988

setcr4(getcr4() & ~CR4_PCE);

usr/src/uts/intel/pcbe/p4_pcbe.c

919

setcr4(curcr4 | CR4_PCE);

usr/src/uts/intel/pcbe/p4_pcbe.c

921

setcr4(curcr4 & ~CR4_PCE);

usr/src/uts/intel/pcbe/p4_pcbe.c

993

setcr4(getcr4() & ~CR4_PCE);

usr/src/uts/intel/sys/x86_archext.h

1772

extern void setcr4(ulong_t);