rxdp
outl(virt_to_bus(&rxd[0]), ioaddr + rxdp);
inl(ioaddr + rxdp));
void ath9k_hw_putrxbuf(struct ath_hal *ah, uint32_t rxdp);
ath9k_hw_putrxbuf(struct ath_hal *ah, uint32_t rxdp)
REG_WRITE(ah, AR_RXDP, rxdp);
void (*ah_setRxDP) (struct ath_hal *, uint32_t rxdp);
xge_hal_ring_rxd_1_t *rxdp __unused; /* doesn't matter 1, 3 or 5... */
rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
xge_assert(rxdp->host_control!=0);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
":"XGE_OS_LLXFMT, rxdp->control_1,
rxdp->control_2, rxdp->buffer0_ptr,
rxdp->host_control);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
rxdp->control_1 = rxdp->control_2 = 0;
__hal_ring_rxd_priv((xge_hal_ring_t *) channelh, rxdp)->allocated = 1;
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
ext_info->l3_cksum = XGE_HAL_RXD_GET_L3_CKSUM(rxdp->control_1);
ext_info->l4_cksum = XGE_HAL_RXD_GET_L4_CKSUM(rxdp->control_1);
ext_info->frame = XGE_HAL_RXD_GET_FRAME_TYPE(rxdp->control_1);
ext_info->proto = XGE_HAL_RXD_GET_FRAME_PROTO(rxdp->control_1);
ext_info->vlan = XGE_HAL_RXD_GET_VLAN_TAG(rxdp->control_2);
ext_info->rth_it_hit = XGE_HAL_RXD_GET_RTH_IT_HIT(rxdp->control_1);
XGE_HAL_RXD_GET_RTH_SPDM_HIT(rxdp->control_1);
XGE_HAL_RXD_GET_RTH_HASH_TYPE(rxdp->control_1);
ext_info->rth_value = XGE_HAL_RXD_1_GET_RTH_VALUE(rxdp->control_2);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
ext_info->l3_cksum = XGE_HAL_RXD_GET_L3_CKSUM(rxdp->control_1);
ext_info->l4_cksum = XGE_HAL_RXD_GET_L4_CKSUM(rxdp->control_1);
ext_info->frame = XGE_HAL_RXD_GET_FRAME_TYPE(rxdp->control_1);
ext_info->proto = XGE_HAL_RXD_GET_FRAME_PROTO(rxdp->control_1);
ext_info->vlan = XGE_HAL_RXD_GET_VLAN_TAG(rxdp->control_2);
ext_info->rth_it_hit = XGE_HAL_RXD_GET_RTH_IT_HIT(rxdp->control_1);
XGE_HAL_RXD_GET_RTH_SPDM_HIT(rxdp->control_1);
XGE_HAL_RXD_GET_RTH_HASH_TYPE(rxdp->control_1);
ext_info->rth_value = (u32)rxdp->buffer0_ptr;
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
rxdp->buffer0_ptr = dma_pointer;
rxdp->control_2 &= (~XGE_HAL_RXD_1_MASK_BUFFER0_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_1_SET_BUFFER0_SIZE(size);
rxdp->control_2,
rxdp->buffer0_ptr);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
*pkt_length = XGE_HAL_RXD_1_GET_BUFFER0_SIZE(rxdp->control_2);
*dma_pointer = rxdp->buffer0_ptr;
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
xge_hal_ring_rxd_3_t *rxdp = (xge_hal_ring_rxd_3_t *)dtrh;
rxdp->buffer0_ptr = dma_pointers[0];
rxdp->control_2 &= (~XGE_HAL_RXD_3_MASK_BUFFER0_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_3_SET_BUFFER0_SIZE(sizes[0]);
rxdp->buffer1_ptr = dma_pointers[1];
rxdp->control_2 &= (~XGE_HAL_RXD_3_MASK_BUFFER1_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_3_SET_BUFFER1_SIZE(sizes[1]);
rxdp->buffer2_ptr = dma_pointers[2];
rxdp->control_2 &= (~XGE_HAL_RXD_3_MASK_BUFFER2_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_3_SET_BUFFER2_SIZE(sizes[2]);
xge_assert(rxdp);
xge_hal_ring_rxd_3_t *rxdp = (xge_hal_ring_rxd_3_t *)dtrh;
dma_pointers[0] = rxdp->buffer0_ptr;
sizes[0] = XGE_HAL_RXD_3_GET_BUFFER0_SIZE(rxdp->control_2);
dma_pointers[1] = rxdp->buffer1_ptr;
sizes[1] = XGE_HAL_RXD_3_GET_BUFFER1_SIZE(rxdp->control_2);
dma_pointers[2] = rxdp->buffer2_ptr;
sizes[2] = XGE_HAL_RXD_3_GET_BUFFER2_SIZE(rxdp->control_2);
xge_hal_ring_rxd_5_t *rxdp = (xge_hal_ring_rxd_5_t *)dtrh;
rxdp->buffer0_ptr = dma_pointers[0];
rxdp->control_2 &= (~XGE_HAL_RXD_5_MASK_BUFFER0_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_5_SET_BUFFER0_SIZE(sizes[0]);
rxdp->buffer1_ptr = dma_pointers[1];
rxdp->control_2 &= (~XGE_HAL_RXD_5_MASK_BUFFER1_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_5_SET_BUFFER1_SIZE(sizes[1]);
rxdp->buffer2_ptr = dma_pointers[2];
rxdp->control_2 &= (~XGE_HAL_RXD_5_MASK_BUFFER2_SIZE);
rxdp->control_2 |= XGE_HAL_RXD_5_SET_BUFFER2_SIZE(sizes[2]);
rxdp->buffer3_ptr = dma_pointers[3];
rxdp->control_3 &= (~XGE_HAL_RXD_5_MASK_BUFFER3_SIZE);
rxdp->control_3 |= XGE_HAL_RXD_5_SET_BUFFER3_SIZE(sizes[3]);
rxdp->buffer4_ptr = dma_pointers[4];
rxdp->control_3 &= (~XGE_HAL_RXD_5_MASK_BUFFER4_SIZE);
rxdp->control_3 |= XGE_HAL_RXD_5_SET_BUFFER4_SIZE(sizes[4]);
xge_hal_ring_rxd_5_t *rxdp = (xge_hal_ring_rxd_5_t *)dtrh;
dma_pointers[0] = rxdp->buffer0_ptr;
sizes[0] = XGE_HAL_RXD_5_GET_BUFFER0_SIZE(rxdp->control_2);
dma_pointers[1] = rxdp->buffer1_ptr;
sizes[1] = XGE_HAL_RXD_5_GET_BUFFER1_SIZE(rxdp->control_2);
dma_pointers[2] = rxdp->buffer2_ptr;
sizes[2] = XGE_HAL_RXD_5_GET_BUFFER2_SIZE(rxdp->control_2);
dma_pointers[3] = rxdp->buffer3_ptr;
sizes[3] = XGE_HAL_RXD_5_GET_BUFFER3_SIZE(rxdp->control_3);
dma_pointers[4] = rxdp->buffer4_ptr;
sizes[4] = XGE_HAL_RXD_5_GET_BUFFER4_SIZE(rxdp->control_3);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
rxdp->control_2 |= XGE_HAL_RXD_NOT_COMPLETED;
XGE_HAL_RXD_SET_T_CODE(rxdp->control_1, XGE_HAL_RXD_T_CODE_UNUSED_C);
rxdp_priv = __hal_ring_rxd_priv((xge_hal_ring_t*)channel, rxdp);
(ulong_t)rxdp->host_control;
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
rxdp->control_1 |= XGE_HAL_RXD_POSTED_4_XFRAME;
priv = __hal_ring_rxd_priv(ring, rxdp);
rxdp->control_1);
xge_hal_ring_rxd_1_t *rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
rxdp->control_1 |= XGE_HAL_RXD_POSTED_4_XFRAME;
priv = __hal_ring_rxd_priv(ring, rxdp);
rxdp->control_1, ring->channel.usage_cnt);
xge_hal_ring_rxd_1_t *rxdp; /* doesn't matter 1, 3 or 5... */
rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
if (rxdp == NULL) {
priv = __hal_ring_rxd_priv(ring, rxdp);
if (!(rxdp->control_2 & XGE_HAL_RXD_NOT_COMPLETED) &&
!(rxdp->control_1 & XGE_HAL_RXD_POSTED_4_XFRAME)) {
rxdp)->host_control!=0);
xge_assert(rxdp->host_control!=0);
*t_code = (u8)XGE_HAL_RXD_GET_T_CODE(rxdp->control_1);
(unsigned long long)(ulong_t)rxdp);
xge_hal_ring_rxd_1_t *rxdp; /* doesn't matter 1, 3 or 5... */
rxdp = (xge_hal_ring_rxd_1_t *)dtrh;
if (rxdp == NULL) {
if (!(rxdp->control_2 & XGE_HAL_RXD_NOT_COMPLETED) &&
!(rxdp->control_1 & XGE_HAL_RXD_POSTED_4_XFRAME)) {
rxdp)->host_control!=0);
xge_assert(rxdp->host_control!=0);
xge_hal_ring_rxd_1_t *rxdp;
rxdp = (xge_hal_ring_rxd_1_t *)
rxd_priv->dma_offset = (char*)rxdp - (char*)memblock;
xge_hal_ring_rxd_5_t *rxdp_5 = (xge_hal_ring_rxd_5_t *)rxdp;
rxdp->host_control = (u64)(ulong_t)rxd_priv;
rxdp->host_control = (u64)(ulong_t)rxd_priv;
vnet_rx_dringdata_desc_t *rxdp;
rxdp = &(ldcp->rxdp[rxi]);
if (rxdp->dstate != VIO_DESC_READY) {
nbytes = rxdp->nbytes;
(rxdp->data_buf_offset !=
rxdp->dstate = VIO_DESC_DONE;
rxdp->data_buf_offset =
rxdp->dstate = VIO_DESC_DONE;
statsp->rbytes += rxdp->nbytes;
vnet_rx_dringdata_desc_t *rxdp;
ldcp->rxdp = (vnet_rx_dringdata_desc_t *)(minfo.vaddr);
bzero(ldcp->rxdp, sizeof (*rxdp) * (ldcp->num_rxds));
rxdp = &(ldcp->rxdp[i]);
rxdp->data_buf_offset = VIO_MBLK_DATA_OFF(vmp) + VNET_IPALIGN;
rxdp->dstate = VIO_DESC_FREE;
ldcp->rxdp = NULL;
vnet_rx_dringdata_desc_t *rxdp;
rxdp = &pub_addr[i];
rxdp->data_buf_offset = VIO_MBLK_DATA_OFF(vmp) + VNET_IPALIGN;
rxdp->dstate = VIO_DESC_FREE;
vnet_rx_dringdata_desc_t *rxdp;
rxdp = &(pub_addr[rxi]);
if (rxdp->dstate != VIO_DESC_READY) {
if ((rxdp->nbytes < ETHERMIN) ||
(rxdp->nbytes > ldcp->lane_in.mtu) ||
(rxdp->data_buf_offset !=
rxdp->dstate = VIO_DESC_DONE;
nbytes = rxdp->nbytes;
rxdp->data_buf_offset =
rxdp->dstate = VIO_DESC_DONE;
statsp->rbytes += rxdp->nbytes;
vnet_rx_dringdata_desc_t *rxdp; /* exported dring */