rx_desc
areap = &bgep->rx_desc[0];
dma_area_t rx_desc[BGE_RECV_RINGS_SPLIT];
(knp++)->value.ui64 = bgep->rx_desc[0].cookie.dmac_laddress;
&bgep->rx_desc[split]);
DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]);
bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring],
area = bgep->rx_desc[rx_rings]; /* note rx_rings = one beyond rings */
bge_free_dma_mem(&bgep->rx_desc[split]);
dma_area_t rx_desc; /* receive descriptors */
&dmfep->rx_desc);
dmfe_free_dma_mem(&dmfep->rx_desc);
descp = &dmfep->rx_desc;
descp = &dmfep->rx_desc;
uint32_t rx_desc;
ngep->rx_desc = NGE_RECV_JB2500_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB4500_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_LOWMEM_SLOTS_DESC;
ngep->rx_desc = dev_param_p->rx_desc_num;
ngep->rx_desc = NGE_RECV_JB2500_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB4500_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC;
ngep->rx_desc = NGE_RECV_LOWMEM_SLOTS_DESC;
ngep->rx_desc =
rxdescsize = ngep->rx_desc;
rrp->desc.nslots = ngep->rx_desc;
for (i = 0; i < ngep->rx_desc; i++, ++bsbdp) {
kmem_free(brp->sw_rbds, (ngep->rx_desc * sizeof (*bsbdp)));
if (sync_start + ngep->param_recv_max_packet <= ngep->rx_desc) {
(ngep->param_recv_max_packet + sync_start - ngep->rx_desc) *
if (sync_start + ngep->recv_count <= ngep->rx_desc) {
(ngep->recv_count + sync_start - ngep->rx_desc) *
int i, ring, tx_desc, rx_desc, rx_jdesc, maxrx;
rx_desc = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
if (rx_desc >= NX_MIN_DRIVER_RDS_SIZE &&
rx_desc <= NX_MAX_SUPPORTED_RDS_SIZE && ISP2(rx_desc)) {
adapter->MaxRxDescCount = rx_desc;
dma_area_t rx_desc;
val32 = rgep->rx_desc.cookie.dmac_laddress;
val32 = rgep->rx_desc.cookie.dmac_laddress >> 32;
DMA_ZERO(rgep->rx_desc);
DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORDEV);
rgep->rx_desc = rgep->dma_area_rxdesc;
DMA_ZERO(rgep->rx_desc);
rgep->rx_ring = rgep->rx_desc.mem_va;
DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORDEV);
DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORKERNEL);
struct rx_desc *descriptor;
struct rx_desc *Rx_desc;
struct rx_desc *descriptor;
sizeof (struct rx_desc), DDI_DMA_SYNC_FORCPU);
length = sizeof (struct rx_desc) * RX_RING_SIZE + ALIGNMENT;
pMil->Rx_desc = (struct rx_desc *)
struct rx_desc_type *desc = dnetp->rx_desc;
} while (!(dnetp->rx_desc[marker].desc0.own) &&
while (!(dnetp->rx_desc[index].desc0.own)) {
dnetp->rx_desc[index].desc0.own = 1;
struct rx_desc_type *descp = &(dnetp->rx_desc[index]);
if ((dnetp->rx_desc != NULL) &&
if (dnetp->rx_desc == NULL) {
(caddr_t *)&dnetp->rx_desc, &len,
NULL, (caddr_t)dnetp->rx_desc,
bzero(dnetp->rx_desc, len);
if (dnetp->rx_desc != NULL) {
dnetp->rx_desc = NULL;
*(uint32_t *)&dnetp->rx_desc[i].desc0 = 0;
*(uint32_t *)&dnetp->rx_desc[i].desc1 = 0;
dnetp->rx_desc[i].desc0.own = 1;
dnetp->rx_desc[i].desc1.buffer_size1 = rx_buf_size;
dnetp->rx_desc[i].buffer1 = dnetp->rx_buf_paddr[i];
dnetp->rx_desc[i].buffer2 = 0;
if ((dnetp->rx_desc[i].buffer1 & ~dnetp->pgmask) !=
dnetp->rx_desc[i].buffer2 = end_paddr&~dnetp->pgmask;
dnetp->rx_desc[i].desc1.buffer_size2 =
dnetp->rx_desc[i].desc1.buffer_size1 =
rx_buf_size-dnetp->rx_desc[i].desc1.buffer_size2;
dnetp->rx_desc[i - 1].desc1.end_of_ring = 1;
struct rx_desc_type *rx_desc; /* virtual addr of recv desc */