rum_write
rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
rum_write(sc, RT2573_TXRX_CSR0, tmp);
rum_write(sc, RT2573_TXRX_CSR4, tmp);
rum_write(sc, RT2573_TXRX_CSR4, tmp);
rum_write(sc, RT2573_TXRX_CSR5, 0x3);
rum_write(sc, RT2573_TXRX_CSR5, 0x150);
rum_write(sc, RT2573_TXRX_CSR5, 0xf);
rum_write(sc, RT2573_PHY_CSR0, tmp);
rum_write(sc, RT2573_TXRX_CSR10, 1 << 12 | 8);
rum_write(sc, RT2573_TXRX_CSR9, tmp);
rum_write(sc, RT2573_MAC_CSR9, tmp);
rum_write(sc, RT2573_MAC_CSR4, tmp);
rum_write(sc, RT2573_MAC_CSR5, tmp);
rum_write(sc, RT2573_MAC_CSR2, tmp);
rum_write(sc, RT2573_MAC_CSR3, tmp);
rum_write(sc, RT2573_TXRX_CSR0, tmp);
rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
rum_write(sc, RT2573_MAC_CSR1, 3);
rum_write(sc, RT2573_MAC_CSR1, 0);
rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
rum_write(sc, RT2573_MAC_CSR1, 3);
rum_write(sc, RT2573_MAC_CSR1, 0);
rum_write(sc, RT2573_MAC_CSR12, 4); /* force wakeup */
rum_write(sc, RT2573_MAC_CSR1, 4);
rum_write(sc, RT2573_TXRX_CSR0, tmp);
rum_write(sc, reg, UGETDW(ucode));
rum_write(sc, RT2573_PHY_CSR3, tmp);
rum_write(sc, RT2573_PHY_CSR3, val);
rum_write(sc, RT2573_PHY_CSR4, tmp);