Symbol: rir
usr/src/common/mc/imc/imc_decode.c
614
const imc_rank_ileave_t *rir = NULL;
usr/src/common/mc/imc/imc_decode.c
629
rir = &chan->ich_rankileaves[i];
usr/src/common/mc/imc/imc_decode.c
630
if (rir->irle_enabled && dec->ids_chanaddr >= base &&
usr/src/common/mc/imc/imc_decode.c
631
dec->ids_chanaddr < rir->irle_limit) {
usr/src/common/mc/imc/imc_decode.c
635
base = rir->irle_limit;
usr/src/common/mc/imc/imc_decode.c
638
if (rir == NULL || i == chan->ich_nrankileaves) {
usr/src/common/mc/imc/imc_decode.c
642
dec->ids_rir = rir;
usr/src/common/mc/imc/imc_decode.c
649
index = (dec->ids_chanaddr >> shift) % rir->irle_nways;
usr/src/common/mc/imc/imc_decode.c
650
if (index >= rir->irle_nentries) {
usr/src/common/mc/imc/imc_decode.c
655
rirtarg = &rir->irle_entries[index];
usr/src/common/mc/imc/imc_decode.c
701
rankaddr /= rir->irle_nways;
usr/src/common/mc/imc/imc_dump.c
392
nvlist_t **dimms, **rir;
usr/src/common/mc/imc/imc_dump.c
402
nvlist_lookup_nvlist_array(nvl, "ich_rankileaves", &rir,
usr/src/common/mc/imc/imc_dump.c
446
if (nvlist_lookup_boolean_value(rir[i], "irle_enabled",
usr/src/common/mc/imc/imc_dump.c
448
nvlist_lookup_uint8(rir[i], "irle_nways",
usr/src/common/mc/imc/imc_dump.c
450
nvlist_lookup_uint8(rir[i], "irle_nwaysbits",
usr/src/common/mc/imc/imc_dump.c
452
nvlist_lookup_uint64(rir[i], "irle_limit",
usr/src/common/mc/imc/imc_dump.c
454
nvlist_lookup_nvlist_array(rir[i], "irle_entries",
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1000
rank = rir[i][j][k].way[0].dimm_rank;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1001
if (rank == rir[i][j][k].way[1].dimm_rank &&
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1002
rank == rir[i][j][k].way[2].dimm_rank &&
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1003
rank == rir[i][j][k].way[3].dimm_rank) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1004
rir[i][j][k].interleave = 1;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1006
(rank == rir[i][j][k].way[1].dimm_rank ||
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1007
rank == rir[i][j][k].way[2].dimm_rank ||
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1008
rank == rir[i][j][k].way[3].dimm_rank) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1009
rir[i][j][k].interleave = 2;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1011
rir[i][j][k].interleave = 4;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1015
rir[i][j][k].way[l].dimm_rank,
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1016
((rir[i][j][k].way[l].soffset +
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1018
rir[i][j][k].interleave));
usr/src/uts/intel/io/intel_nhm/mem_addr.c
1020
base = rir[i][j][k].limit;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
298
if (caddr >= base && caddr < rir[node][channel][i].limit) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
302
rir[node][channel][i].way[way].offset *
usr/src/uts/intel/io/intel_nhm/mem_addr.c
304
rir[node][channel][i].interleave) &
usr/src/uts/intel/io/intel_nhm/mem_addr.c
309
rir[node][channel][i].way[way].offset *
usr/src/uts/intel/io/intel_nhm/mem_addr.c
311
rir[node][channel][i].interleave) &
usr/src/uts/intel/io/intel_nhm/mem_addr.c
314
rank = rir[node][channel][i].way[way].rank;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
318
base = rir[node][channel][i].limit;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
432
if (rir[node][channel][i].way[way].dimm_rank == rank) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
433
rlimit = rir[node][channel][i].way[way].rlimit;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
439
rir[node][channel][i].interleave -
usr/src/uts/intel/io/intel_nhm/mem_addr.c
440
(int64_t)rir[node][channel][i].
usr/src/uts/intel/io/intel_nhm/mem_addr.c
446
rir[node][channel][i].interleave -
usr/src/uts/intel/io/intel_nhm/mem_addr.c
447
(int64_t)rir[node][channel][i].
usr/src/uts/intel/io/intel_nhm/mem_addr.c
452
if (caddr < rir[node][channel][i].limit) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
454
rir[node][channel][i].interleave;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
455
rank_sz = (rir[node][channel][i].limit -
usr/src/uts/intel/io/intel_nhm/mem_addr.c
46
rir_t rir[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
usr/src/uts/intel/io/intel_nhm/mem_addr.c
468
base = rir[node][channel][i].limit;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
878
if (rir[socket][channel][k].way[l].dimm_rank == rank &&
usr/src/uts/intel/io/intel_nhm/mem_addr.c
879
rir[socket][channel][k].way[l].rlimit == 0) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
880
rir[socket][channel][k].way[l].rlimit =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
890
if (rir[socket][channel][k].way[l].dimm_rank == rank &&
usr/src/uts/intel/io/intel_nhm/mem_addr.c
891
rir[socket][channel][k].way[l].rlimit == 0) {
usr/src/uts/intel/io/intel_nhm/mem_addr.c
892
rir[socket][channel][k].way[l].rlimit = rank_addr;
usr/src/uts/intel/io/intel_nhm/mem_addr.c
984
rir[i][j][k].limit = RIR_LIMIT(rir_limit);
usr/src/uts/intel/io/intel_nhm/mem_addr.c
987
rir[i][j][k].way[l].offset =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
989
rir[i][j][k].way[l].soffset =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
991
rir[i][j][k].way[l].rank =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
993
rir[i][j][k].way[l].dimm =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
995
rir[i][j][k].way[l].dimm_rank =
usr/src/uts/intel/io/intel_nhm/mem_addr.c
997
rir[i][j][k].way[l].rlimit = 0;
usr/src/uts/intel/io/intel_nhm/mem_addr.h
64
extern rir_t rir[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]