rge_reg_put32
rge_reg_put32(rgep, ID_0_REG, val32);
rge_reg_put32(rgep, ID_4_REG, val32);
rge_reg_put32(rgep, MULTICAST_0_REG, ~0U);
rge_reg_put32(rgep, MULTICAST_4_REG, ~0U);
rge_reg_put32(rgep, MULTICAST_0_REG, RGE_BSWAP_32(hashp[0]));
rge_reg_put32(rgep, MULTICAST_4_REG, RGE_BSWAP_32(hashp[1]));
rge_reg_put32(rgep, DUMP_COUNTER_REG_1,
rge_reg_put32(rgep, DUMP_COUNTER_REG_0, regval);
rge_reg_put32(rgep, DUMP_COUNTER_REG_0, regval | DUMP_START);
rge_reg_put32(rgep, TIMER_INT_REG, itimer);
rge_reg_put32(rgep, TIMER_COUNT_REG, 0);
rge_reg_put32(rgep, PHY_ACCESS_REG, regval);
rge_reg_put32(rgep, PHY_ACCESS_REG, regval);
rge_reg_put32(rgep, EPHY_ACCESS_REG, regval);
rge_reg_put32(rgep, 0x7c, 0x000700ff);
rge_reg_put32(rgep, 0x7c, 0x0007ff00);
rge_reg_put32(rgep, regno, regval);
rge_reg_put32(rgep, RT_CSI_DATA_REG, 0x00021c01);
rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f088);
rge_reg_put32(rgep, RT_CSI_DATA_REG, 0x00004000);
rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f0b0);
rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x0000f068);
rge_reg_put32(rgep, RT_CSI_DATA_REG, val32);
rge_reg_put32(rgep, RT_CSI_ACCESS_REG, 0x8000f068);
rge_reg_put32(rgep, RX_CONFIG_REG, val32 | chip->rxconfig);
rge_reg_put32(rgep, TX_CONFIG_REG, val32 | chip->txconfig);
rge_reg_put32(rgep, NORMAL_TX_RING_ADDR_LO_REG, val32);
rge_reg_put32(rgep, NORMAL_TX_RING_ADDR_HI_REG, val32);
rge_reg_put32(rgep, HIGH_TX_RING_ADDR_LO_REG, 0);
rge_reg_put32(rgep, HIGH_TX_RING_ADDR_HI_REG, 0);
rge_reg_put32(rgep, RX_RING_ADDR_LO_REG, val32);
rge_reg_put32(rgep, RX_RING_ADDR_HI_REG, val32);
rge_reg_put32(rgep, regno, regval);
rge_reg_put32(rgep, MULTICAST_0_REG, ~0U);
rge_reg_put32(rgep, MULTICAST_4_REG, ~0U);
rge_reg_put32(rgep, MULTICAST_0_REG, RGE_BSWAP_32(hashp[0]));
rge_reg_put32(rgep, MULTICAST_4_REG, RGE_BSWAP_32(hashp[1]));
rge_reg_put32(rgep, RX_PKT_MISS_COUNT_REG, 0);
rge_reg_put32(rgep, TIMER_INT_REG, TIMER_INT_NONE);
rge_reg_put32(rgep, TIMER_COUNT_REG, 0);