ADCSR
emu10k_write_reg(devc, ADCSR, 0, 0x0);
emu10k_write_reg(devc, ADCSR, 0, tmp); /* GO */
emu10k_write_reg(devc, ADCSR, 0, 0);
emu10k_write_reg(devc, ADCSR, 0, 0); /* reset for phase */