ql_wait_reg_bit
return (ql_wait_reg_bit(qlge, REG_CONFIGURATION, bit, BIT_RESET, 0));
if (ql_wait_reg_bit(qlge, REG_MAC_PROTOCOL_ADDRESS_INDEX,
if (ql_wait_reg_bit(qlge, REG_XGMAC_ADDRESS, XGMAC_ADDRESS_RDY,
if (ql_wait_reg_bit(qlge, REG_XGMAC_ADDRESS, XGMAC_ADDRESS_RDY,
if (ql_wait_reg_bit(qlge, REG_RESET_FAILOVER, FUNCTION_RESET,
if (ql_wait_reg_bit(qlge, REG_XG_SERDES_ADDR,
if (ql_wait_reg_bit(qlge, REG_XG_SERDES_ADDR,
if (ql_wait_reg_bit(qlge, REG_HOST_CMD_STATUS, RISC_RESET,
if (ql_wait_reg_bit(qlge, REG_HOST_CMD_STATUS,
if (ql_wait_reg_bit(qlge, REG_STATUS, STS_PI, BIT_SET, timeout)
if (ql_wait_reg_bit(qlge, REG_PROCESSOR_ADDR,
extern int ql_wait_reg_bit(qlge_t *, uint32_t, uint32_t, int, uint32_t);