ql_pci_config_get32
size = ql_pci_config_get32(ha, PCI_CONF_BASE0) & BIT_0 ?
fw->aer_ues = ql_pci_config_get32(ha, 0x104);
fw->aer_ues = ql_pci_config_get32(ha, 0x104);
chs.chs_base0 = ql_pci_config_get32(ha, PCI_CONF_BASE0);
chs.chs_base1 = ql_pci_config_get32(ha, PCI_CONF_BASE1);
chs.chs_base2 = ql_pci_config_get32(ha, PCI_CONF_BASE2);
chs.chs_base3 = ql_pci_config_get32(ha, PCI_CONF_BASE3);
chs.chs_base4 = ql_pci_config_get32(ha, PCI_CONF_BASE4);
chs.chs_base5 = ql_pci_config_get32(ha, PCI_CONF_BASE5);
w32 = ql_pci_config_get32(ha, ofst);
fw->aer_ues = ql_pci_config_get32(ha, 0x104);
chip.IoAddr = ql_pci_config_get32(ha, PCI_CONF_BASE0);
chip.MemAddr = ql_pci_config_get32(ha, PCI_CONF_BASE1);
*ptr32 = (uint32_t)ql_pci_config_get32(ha, pci_os);
uint32_t ql_pci_config_get32(ql_adapter_state_t *, off_t);