usr/src/lib/fm/topo/modules/common/zen/topo_zen.c

61

if (df->atd_rev >= DF_REV_4 && topo_zen_df_at_least(df, 4, 1)) {

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_errors.c

159

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_hole.c

248

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_nps.c

1208

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_nps.c

1505

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_nps.c

33

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_nps.c

812

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_nps.c

942

.umc_df_rev = DF_REV_4,

usr/src/test/os-tests/tests/zen_umc/zen_umc_test_remap.c

252

.umc_df_rev = DF_REV_4,

usr/src/uts/intel/io/amdzen/amdzen.c

1093

case DF_REV_4:

usr/src/uts/intel/io/amdzen/amdzen.c

1184

if (df->adf_rev >= DF_REV_4) {

usr/src/uts/intel/io/amdzen/amdzen.c

1230

case DF_REV_4:

usr/src/uts/intel/io/amdzen/amdzen.c

1272

if (df->adf_rev <= DF_REV_4) {

usr/src/uts/intel/io/amdzen/amdzen.c

1300

if (df->adf_rev >= DF_REV_4) {

usr/src/uts/intel/io/amdzen/amdzen.c

1320

case DF_REV_4:

usr/src/uts/intel/io/amdzen/amdzen.c

307

case DF_REV_4:

usr/src/uts/intel/io/amdzen/amdzen.c

705

if (df->adf_rev >= DF_REV_4 && amdzen_df_at_least(df, 4, 1)) {

usr/src/uts/intel/io/amdzen/amdzen.c

890

if (df->adf_rev >= DF_REV_4 && amdzen_df_at_least(df, 4, 1)) {

usr/src/uts/intel/io/amdzen/amdzen.c

963

df->adf_rev = DF_REV_4;

usr/src/uts/intel/io/amdzen/zen_umc.c

2181

case DF_REV_4:

usr/src/uts/intel/io/amdzen/zen_umc.c

2298

case DF_REV_4:

usr/src/uts/intel/io/amdzen/zen_umc.c

2392

case DF_REV_4:

usr/src/uts/intel/io/amdzen/zen_umc.c

3562

case DF_REV_4:

usr/src/uts/intel/io/amdzen/zen_umc.c

3591

case DF_REV_4:

usr/src/uts/intel/io/amdzen/zen_umc.c

3918

case DF_REV_4:

usr/src/uts/intel/sys/amdzen/df.h

111

#define DF_REV_ALL_4 (DF_REV_4 | DF_REV_4D2)

usr/src/uts/intel/sys/amdzen/df.h

1118

#define DF_CCMCFG4_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

1186

case DF_REV_4:

usr/src/uts/intel/sys/amdzen/df.h

231

DF_REV_4, .drd_func = 0, .drd_reg = 0x48 }

usr/src/uts/intel/sys/amdzen/df.h

243

DF_REV_4, .drd_func = 0, .drd_reg = 0x4c }

usr/src/uts/intel/sys/amdzen/df.h

303

#define DF_CS_REMAP0A_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

306

#define DF_CS_REMAP0B_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

309

#define DF_CS_REMAP1A_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

312

#define DF_CS_REMAP1B_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

315

#define DF_CS_REMAP2A_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

318

#define DF_CS_REMAP2B_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

321

#define DF_CS_REMAP3A_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

324

#define DF_CS_REMAP3B_V4 (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

586

#define DF_DRAM_BASE_V4(x) (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

596

#define DF_DRAM_LIMIT_V4(x) (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

608

#define DF_DRAM_CTL_V4(x) (df_reg_def_t){ .drd_gens = DF_REV_4, \

usr/src/uts/intel/sys/amdzen/df.h

635

#define DF_DRAM_ILV_V4(x) (df_reg_def_t){ .drd_gens = DF_REV_4, \