usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3127

uint32_t *ptpbase32, pte32;

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3145

pte32 = ptpbase32[ptpindex];

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3147

if ((pte32 & PG_V) == 0 ||

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3148

(usermode && (pte32 & PG_U) == 0) ||

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3149

(writable && (pte32 & PG_RW) == 0)) {

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3152

0, pte32);

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3168

if (!check_only && (pte32 & PG_A) == 0) {

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3170

pte32, pte32 | PG_A) == 0) {

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3176

if (nlevels > 0 && (pte32 & PG_PS) != 0)

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3179

ptpphys = pte32;

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3183

if (!check_only && writable && (pte32 & PG_M) == 0) {

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3185

pte32, pte32 | PG_M) == 0) {

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3191

pte32 >>= ptpshift; pte32 <<= ptpshift;

usr/src/uts/intel/io/vmm/vmm_instruction_emul.c

3192

*gpa = pte32 | (gla & (pgsize - 1));