phy_write
static void phy_write(int, u16);
phy_write(16, 0x5); /* DM9801 E4 */
phy_write(16, 0x1005); /* DM9801 E3 and others */
phy_write(25, ((phy_read(24) + 3) & 0xff) | 0xf000);
phy_write(16, 0x5);
phy_write(25, (phy_read(25) & 0xff00) + 2);
phy_write(0, 0);
phy_write(ph, MII_CONTROL, MII_CONTROL_ISOLATE);
phy_write(ph, MII_MSCONTROL, gtcr);
phy_write(ph, MII_CONTROL, bmcr);
phy_write(ph, MII_AN_ADVERT, anar);
phy_write(ph, MII_CONTROL, bmcr & ~(MII_CONTROL_RSAN));
phy_write(ph, MII_MSCONTROL, gtcr);
phy_write(ph, MII_CONTROL, bmcr);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_LED_PSEL,
phy_write(ph, MVPHY_PAGE_ADDR, 17);
phy_write(ph, MVPHY_PAGE_DATA, 0x3f60);
phy_write(ph, MII_CONTROL, reg);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_EADR, 0);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_EADR, 2);
phy_write(ph, MVPHY_EADR, 255);
phy_write(ph, 0x18, 0xaa99);
phy_write(ph, 0x17, 0x2011);
phy_write(ph, 0x18, 0xa204);
phy_write(ph, 0x17, 0x2002);
phy_write(ph, MVPHY_EADR, 3);
phy_write(ph, MVPHY_PSC,
phy_write(ph, MVPHY_INTEN, 0);
phy_write(ph, MVPHY_EADR, 0);
phy_write(ph, MVPHY_PAGE_ADDR, 3);
phy_write(ph, MVPHY_PAGE_DATA, 0);
phy_write(ph, MVPHY_EADR, 0);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_EADR, 2);
phy_write(ph, MVPHY_EADR, 3);
phy_write(ph, MVPHY_PSC,
phy_write(ph, MVPHY_INTEN, 0);
phy_write(ph, MVPHY_EADR, 0);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_EADR, 2);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_EADR, page);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, MVPHY_PSC, reg);
phy_write(ph, QS_IMASK_REG, 0);
phy_write(ph, QS_BTXPC, val | QS_BTXPC_SCRAM_DIS);
phy_write(ph, QS_BTXPC, val);
void phy_write(phy_handle_t *, uint8_t, uint16_t);
phy_write(phy, reg, phy_read(phy, reg) | (bit))
phy_write(phy, reg, phy_read(phy, reg) & ~(bit))