Symbol: phy_read
usr/src/grub/grub-0.97/netboot/davicom.c
167
static int phy_read(int);
usr/src/grub/grub-0.97/netboot/davicom.c
331
if ( (phy_read(3) & 0xfff0) == 0xb900 ) {
usr/src/grub/grub-0.97/netboot/davicom.c
332
if ( phy_read(31) == 0x4404 ) {
usr/src/grub/grub-0.97/netboot/davicom.c
334
if (phy_read(3) == 0xb901)
usr/src/grub/grub-0.97/netboot/davicom.c
338
phy_write(25, ((phy_read(24) + 3) & 0xff) | 0xf000);
usr/src/grub/grub-0.97/netboot/davicom.c
342
phy_write(25, (phy_read(25) & 0xff00) + 2);
usr/src/grub/grub-0.97/netboot/davicom.c
363
while ( ((phy_read(1) & 0x24)!=0x24) && (currticks() < to))
usr/src/grub/grub-0.97/netboot/davicom.c
366
if ( (phy_read(1) & 0x24) == 0x24 ) {
usr/src/grub/grub-0.97/netboot/davicom.c
367
if (phy_read(17) & 0xa000)
usr/src/uts/common/io/mii/mii.c
1115
if ((phy_read(ph, MII_CONTROL) & MII_CONTROL_RESET) == 0) {
usr/src/uts/common/io/mii/mii.c
1387
status = phy_read(ph, MII_STATUS);
usr/src/uts/common/io/mii/mii.c
1388
control = phy_read(ph, MII_CONTROL);
usr/src/uts/common/io/mii/mii.c
1391
lpar = phy_read(ph, MII_AN_LPABLE);
usr/src/uts/common/io/mii/mii.c
1392
anexp = phy_read(ph, MII_AN_EXPANSION);
usr/src/uts/common/io/mii/mii.c
1403
if ((status != phy_read(ph, MII_STATUS)) && debounces) {
usr/src/uts/common/io/mii/mii.c
1530
msstat = phy_read(ph, MII_MSSTATUS);
usr/src/uts/common/io/mii/mii.c
1672
bmsr = phy_read(ph, MII_STATUS);
usr/src/uts/common/io/mii/mii.c
1673
bmsr = phy_read(ph, MII_STATUS);
usr/src/uts/common/io/mii/mii.c
1680
extsr = phy_read(ph, MII_EXTSTATUS);
usr/src/uts/common/io/mii/mii.c
1686
ph->phy_id = ((uint32_t)phy_read(ph, MII_PHYIDH) << 16) |
usr/src/uts/common/io/mii/mii.c
1687
phy_read(ph, MII_PHYIDL);
usr/src/uts/common/io/mii/mii.c
1859
if ((phy_read(ph, MII_STATUS) & MII_STATUS_LINKUP) &&
usr/src/uts/common/io/mii/mii.c
1860
(phy_read(ph, MII_STATUS) & MII_STATUS_LINKUP) &&
usr/src/uts/common/io/mii/mii_marvell.c
156
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
193
reg = phy_read(ph, MII_CONTROL);
usr/src/uts/common/io/mii/mii_marvell.c
197
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
215
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
233
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
294
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
325
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
342
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
364
if (phy_read(ph, MVPHY_EPSS) & MV_EPSS_FCRESOL) {
usr/src/uts/common/io/mii/mii_marvell.c
369
page = phy_read(ph, MVPHY_EADR);
usr/src/uts/common/io/mii/mii_marvell.c
372
page = phy_read(ph, MVPHY_EADR);
usr/src/uts/common/io/mii/mii_marvell.c
374
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
381
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
399
if (phy_read(ph, MVPHY_EPSS) & MV_EPSS_FCRESOL) {
usr/src/uts/common/io/mii/mii_marvell.c
405
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_marvell.c
422
reg = phy_read(ph, MVPHY_PSC);
usr/src/uts/common/io/mii/mii_qualsemi.c
82
val = phy_read(ph, QS_BTXPC);
usr/src/uts/common/io/mii/mii_realtek.c
105
s = phy_read(ph, MII_VENDOR(9));
usr/src/uts/common/io/mii/mii_realtek.c
78
s = phy_read(ph, MII_VENDOR(0));
usr/src/uts/common/io/mii/miipriv.h
167
uint16_t phy_read(phy_handle_t *, uint8_t);
usr/src/uts/common/io/mii/miipriv.h
36
phy_write(phy, reg, phy_read(phy, reg) | (bit))
usr/src/uts/common/io/mii/miipriv.h
38
phy_write(phy, reg, phy_read(phy, reg) & ~(bit))