pcishpc_read_reg
static uint32_t pcishpc_read_reg(pcie_hp_ctrl_t *ctrl_p, int reg);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_CTRL_SERR_INT_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_LOGICAL_SLOT_REGS+slot);
pcishpc_read_reg(ctrl_p,
reg = pcishpc_read_reg(ctrl_p, PCI_HP_CTRL_SERR_INT_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_LOGICAL_SLOT_REGS+slot);
status = pcishpc_read_reg(slot_p->hs_ctrl,
reg = pcishpc_read_reg(slot_p->hs_ctrl,
reg = pcishpc_read_reg(slot_p->hs_ctrl,
status = pcishpc_read_reg(ctrl_p, PCI_HP_COMMAND_STATUS_REG);
reg = pcishpc_read_reg(slot_p->hs_ctrl,
reg = pcishpc_read_reg(slot_p->hs_ctrl,
status = pcishpc_read_reg(ctrl_p,
status = pcishpc_read_reg(ctrl_p,
slots_avail1_reg = pcishpc_read_reg(ctrl_p,
slots_avail2_reg = pcishpc_read_reg(ctrl_p,
status = pcishpc_read_reg(ctrl_p, PCI_HP_PROF_IF_SBCR_REG) &
": 0x%08x\n", pcishpc_read_reg(ctrl_p, PCI_HP_BASE_OFFSET_REG));
reg = pcishpc_read_reg(ctrl_p, PCI_HP_SLOTS_AVAIL_I_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_SLOTS_AVAIL_II_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_SLOT_CONFIGURATION_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_PROF_IF_SBCR_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_COMMAND_STATUS_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_IRQ_LOCATOR_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_SERR_LOCATOR_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_CTRL_SERR_INT_REG);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_LOGICAL_SLOT_REGS+slot);
reg = pcishpc_read_reg(ctrl_p, PCI_HP_CTRL_SERR_INT_REG);
irq_locator = pcishpc_read_reg(ctrl_p, PCI_HP_IRQ_LOCATOR_REG);
irq_serr_locator = pcishpc_read_reg(ctrl_p, PCI_HP_SERR_LOCATOR_REG);
reg = pcishpc_read_reg(ctrl_p,
config = pcishpc_read_reg(ctrl_p, PCI_HP_SLOT_CONFIGURATION_REG);