pcieadm_cfgspace_print_hex
{ 0x8, 1, "revision", "Revision ID", pcieadm_cfgspace_print_hex },
{ 0x28, 4, "cis", "Cardbus CIS Pointer", pcieadm_cfgspace_print_hex },
{ 0x34, 1, "cap", "Capabilities Pointer", pcieadm_cfgspace_print_hex },
{ 0x3c, 1, "iline", "Interrupt Line", pcieadm_cfgspace_print_hex },
{ 0x3e, 1, "gnt", "Min_Gnt", pcieadm_cfgspace_print_hex },
{ 0x3f, 1, "lat", "Min_Lat", pcieadm_cfgspace_print_hex },
{ 0x8, 1, "revision", "Revision ID", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x8, 1, "revision", "Revision ID", pcieadm_cfgspace_print_hex },
{ 0x4, 2, "subvid", "Subsystem Vendor ID", pcieadm_cfgspace_print_hex },
{ 0x6, 2, "subdev", "Subsystem Device ID", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x4, 4, "data", "VPD Data", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x8, 4, "laneerr", "Lane Error Status", pcieadm_cfgspace_print_hex },
{ 0x10, 8, "rx", "Multicast Receive", pcieadm_cfgspace_print_hex },
{ 0x18, 8, "block", "Multicast Block All", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x4, 1, "bar", "BAR", pcieadm_cfgspace_print_hex },
{ 0x8, 2, "offset", "Offset", pcieadm_cfgspace_print_hex },
{ 0xc, 2, "len", "Length", pcieadm_cfgspace_print_hex },
{ 0x10, 2, "mult", "Multiplier", pcieadm_cfgspace_print_hex },
{ 0x10, 4, "data", "Data", pcieadm_cfgspace_print_hex },
{ 0x2, 1, "length", "Length", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0xc, 2, "initvfs", "Initial VFs", pcieadm_cfgspace_print_hex },
{ 0xe, 2, "totvfs", "Total VFs", pcieadm_cfgspace_print_hex },
{ 0x10, 2, "numvfs", "Number VFs", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x14, 2, "offset", "First VF Offset", pcieadm_cfgspace_print_hex },
{ 0x16, 2, "stride", "VF Stride", pcieadm_cfgspace_print_hex },
{ 0x1a, 2, "devid", "VF Device ID", pcieadm_cfgspace_print_hex },
{ 0x8, 4, "lat", "DPA Latency Indicator", pcieadm_cfgspace_print_hex },
{ 0x4, 1, "sel", "Data Select", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex(walkp, print, NULL);
pcieadm_cfgspace_print_hex(walkp, print, NULL);
p.pcp_print = pcieadm_cfgspace_print_hex;
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
{ 0x1a, 1, "bus", "Bus Number", pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex(walkp, print, arg);
p.pcp_print = pcieadm_cfgspace_print_hex;
pcieadm_cfgspace_print_hex },
pcieadm_cfgspace_print_hex },
p.pcp_print = pcieadm_cfgspace_print_hex;
p.pcp_print = pcieadm_cfgspace_print_hex;