usr/src/uts/common/io/1394/adapters/hci1394_attach.c

470

pci_config_put32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

553

pci_config_put32(soft_state->pci_config,

usr/src/uts/common/io/arn/arn_main.c

2859

pci_config_put32(sc->sc_cfg_handle, 0x40, val & 0xffff00ff);

usr/src/uts/common/io/ath/ath_main.c

2041

pci_config_put32(asc->asc_cfg_handle, 0x40, val & 0xffff00ff);

usr/src/uts/common/io/audio/drv/audiovia823x/audiovia823x.c

535

pci_config_put32(pcih, AUVIA_PCICFG, val);

usr/src/uts/common/io/bfe/bfe.c

964

pci_config_put32(bfe->bfe_conf_handle, BFE_BAR0_WIN, BFE_REG_PCI);

usr/src/uts/common/io/bfe/bfe.c

980

pci_config_put32(bfe->bfe_conf_handle, BFE_BAR0_WIN, bar_orig);

usr/src/uts/common/io/bge/bge_chip2.c

209

pci_config_put32(bgep->cfg_handle, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

242

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);

usr/src/uts/common/io/bge/bge_chip2.c

267

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIAAR, regno);

usr/src/uts/common/io/bge/bge_chip2.c

268

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_RIADR, val);

usr/src/uts/common/io/bge/bge_chip2.c

3174

pci_config_put32(bgep->cfg_handle,

usr/src/uts/common/io/bge/bge_chip2.c

3218

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR,

usr/src/uts/common/io/bge/bge_chip2.c

355

pci_config_put32(handle, PCI_CONF_BGE_MHCR, 0);

usr/src/uts/common/io/bge/bge_chip2.c

3651

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR,

usr/src/uts/common/io/bge/bge_chip2.c

3874

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR, mhcr);

usr/src/uts/common/io/bge/bge_chip2.c

3907

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR, mhcr);

usr/src/uts/common/io/bge/bge_chip2.c

3947

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR, mhcr);

usr/src/uts/common/io/bge/bge_chip2.c

4236

pci_config_put32(bgep->cfg_handle,

usr/src/uts/common/io/bge/bge_chip2.c

4263

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_PDRWCR,

usr/src/uts/common/io/bge/bge_chip2.c

470

pci_config_put32(handle, PCI_CONF_BGE_MHCR, mhcr);

usr/src/uts/common/io/bge/bge_chip2.c

482

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_PCISTATE, pci_state);

usr/src/uts/common/io/bge/bge_chip2.c

4855

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR,

usr/src/uts/common/io/bge/bge_chip2.c

541

pci_config_put32(handle, PCI_CONF_BGE_RIAAR, 0);

usr/src/uts/common/io/bge/bge_chip2.c

542

pci_config_put32(handle, PCI_CONF_BGE_MWBAR, 0);

usr/src/uts/common/io/bge/bge_chip2.c

5533

pci_config_put32(bgep->cfg_handle, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

6275

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWBAR, addr);

usr/src/uts/common/io/bge/bge_chip2.c

6277

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWBAR, 0);

usr/src/uts/common/io/bge/bge_chip2.c

849

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWBAR, base);

usr/src/uts/common/io/bge/bge_chip2.c

905

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWBAR, addr);

usr/src/uts/common/io/bge/bge_chip2.c

907

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWDAR, data);

usr/src/uts/common/io/bge/bge_chip2.c

908

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MWBAR, 0);

usr/src/uts/common/io/bge/bge_main2.c

3730

pci_config_put32(bgep->cfg_handle,

usr/src/uts/common/io/bge/bge_main2.c

3760

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR, 0);

usr/src/uts/common/io/bge/bge_main2.c

3768

pci_config_put32(bgep->cfg_handle, PCI_CONF_BGE_MHCR, mhcrValue);

usr/src/uts/common/io/bnx/bnx_mm.c

129

pci_config_put32(udevp->os_param.pci_cfg_handle,

usr/src/uts/common/io/bnxe/bnxe_mm.c

125

pci_config_put32(pUM->pPciCfg, (off_t)pciReg, regValue);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1140

pci_config_put32(phdl->handle, phdl->io_decode_reg, io_reg);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1440

pci_config_put32(handle, PCI_BCNF_PF_BASE_LOW, 0x0000ffff);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1441

pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1443

pci_config_put32(handle, PCI_BCNF_PF_LIMIT_HIGH, 0x0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1485

pci_config_put32(handle, PCI_CBUS_MEM_BASE0,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1496

pci_config_put32(handle, PCI_CBUS_IO_BASE0,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1520

pci_config_put32(handle, PCI_CBUS_MEM_BASE1, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1521

pci_config_put32(handle, PCI_CBUS_MEM_LIMIT1, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1522

pci_config_put32(handle, PCI_CBUS_IO_BASE1, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1523

pci_config_put32(handle, PCI_CBUS_IO_LIMIT1, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1598

pci_config_put32(handle, PCI_CBUS_MEM_LIMIT0,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

1659

pci_config_put32(handle, PCI_CBUS_IO_LIMIT0, rlval);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

2711

pci_config_put32(config_handle,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

2953

pci_config_put32(config_handle, i, 0xffffffff);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

3007

pci_config_put32(config_handle, PCI_CONF_ROM, 0xffffffff);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

4172

pci_config_put32(config_handle, PCI_CBUS_MEM_LIMIT0, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

4173

pci_config_put32(config_handle, PCI_CBUS_MEM_BASE0, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

4174

pci_config_put32(config_handle, PCI_CBUS_IO_LIMIT0, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

4175

pci_config_put32(config_handle, PCI_CBUS_IO_BASE0, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

900

pci_config_put32(handle, offset,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

902

pci_config_put32(handle, offset + 4,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

920

pci_config_put32(handle, offset, 0xffffffff);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

923

pci_config_put32(handle, offset,

usr/src/uts/common/io/cardbus/cardbus_cfg.c

936

pci_config_put32(handle, offset + 4, 0);

usr/src/uts/common/io/cardbus/cardbus_cfg.c

956

pci_config_put32(handle, offset, io_answer);

usr/src/uts/common/io/chxge/ch.c

1432

pci_config_put32(chp->ch_hpci, 0x44, 3);

usr/src/uts/common/io/chxge/ch.c

1433

pci_config_put32(chp->ch_hpci, 0x44, 0);

usr/src/uts/common/io/chxge/ch.c

485

pci_config_put32(chp->ch_hpci, 0x44, 3);

usr/src/uts/common/io/chxge/ch.c

486

pci_config_put32(chp->ch_hpci, 0x44, 0);

usr/src/uts/common/io/chxge/ch.c

754

pci_config_put32(chp->ch_hpci, 0x44, 3);

usr/src/uts/common/io/chxge/ch.c

755

pci_config_put32(chp->ch_hpci, 0x44, 0);

usr/src/uts/common/io/chxge/ch.c

814

pci_config_put32(chp->ch_hpci, 0x44, 3);

usr/src/uts/common/io/chxge/ch.c

815

pci_config_put32(chp->ch_hpci, 0x44, 0);

usr/src/uts/common/io/chxge/glue.c

125

pci_config_put32(obj->ch_hpci, reg, val);

usr/src/uts/common/io/chxge/glue.c

282

pci_config_put32(chp->ch_hpci, pe->addr, pe->pe_reg_val);

usr/src/uts/common/io/comstar/port/qlt/qlt.h

565

pci_config_put32(qlt->pcicfg_acc_handle, (off_t)(addr), \

usr/src/uts/common/io/cxgbe/common/t4_hw.c

77

pci_config_put32(sc->pci_regh, reg, val);

usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c

87

pci_config_put32(sc->pci_regh, r.reg, r.value);

usr/src/uts/common/io/dmfe/dmfe_main.c

2462

pci_config_put32(handle, PCI_CONF_COMM, (regval | PCI_COMM_ME));

usr/src/uts/common/io/dmfe/dmfe_main.c

2465

pci_config_put32(handle, PCI_DMFE_CONF_CFDD,

usr/src/uts/common/io/e1000g/e1000g_debug.c

581

pci_config_put32(handle, offset, 0xffffffff);

usr/src/uts/common/io/e1000g/e1000g_debug.c

589

pci_config_put32(handle, offset, base);

usr/src/uts/common/io/fibre-channel/fca/qlc/ql_api.c

16493

pci_config_put32(ha->pci_handle, off, val);

usr/src/uts/common/io/i2c/ctrl/pchsmbus/pchsmbus.c

1036

pci_config_put32(pch->ps_cfg, PCH_R_PCIE_HCFG, val);

usr/src/uts/common/io/i2c/ctrl/pchsmbus/pchsmbus.c

1111

pci_config_put32(pch->ps_cfg, PCH_R_PCIE_HCFG,

usr/src/uts/common/io/i2c/ctrl/pchsmbus/pchsmbus.c

393

pci_config_put32(pch->ps_cfg, PCH_R_PCIE_HCFG, val);

usr/src/uts/common/io/i2c/ctrl/pchsmbus/pchsmbus.c

840

pci_config_put32(pch->ps_cfg, PCH_R_PCIE_HCFG, val);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

3911

pci_config_put32(hdl, i << 2, state->hs_cfg_data[i]);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

3921

pci_config_put32(hdl, offset + HERMON_PCI_CAP_DEV_OFFS, data32);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

3923

pci_config_put32(hdl, offset + HERMON_PCI_CAP_LNK_OFFS, data32);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

3925

pci_config_put32(hdl, 0x04, (state->hs_cfg_data[1] | 0x0006));

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

4193

(void) pci_config_put32(hdl, offset, addr << 16);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

4966

pci_config_put32(pcihdl, i << 2, state->hs_cfg_data[i]);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

4999

pci_config_put32(pcihdl, offset + HERMON_PCI_CAP_DEV_OFFS, data32);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

5001

pci_config_put32(pcihdl, offset + HERMON_PCI_CAP_LNK_OFFS, data32);

usr/src/uts/common/io/ib/adapters/hermon/hermon.c

5004

pci_config_put32(pcihdl, 0x04, (state->hs_cfg_data[1] | 0x0006));

usr/src/uts/common/io/ib/adapters/hermon/hermon_ioctl.c

2676

pci_config_put32(pci_config_hdl, HERMON_HW_FLASH_CFG_ADDR,

usr/src/uts/common/io/ib/adapters/hermon/hermon_ioctl.c

2734

pci_config_put32(pci_config_hdl, HERMON_HW_FLASH_CFG_ADDR,

usr/src/uts/common/io/ib/adapters/hermon/hermon_ioctl.c

2736

pci_config_put32(pci_config_hdl, HERMON_HW_FLASH_CFG_DATA,

usr/src/uts/common/io/ib/adapters/tavor/tavor.c

2393

pci_config_put32(phdl, i << 2,

usr/src/uts/common/io/ib/adapters/tavor/tavor.c

2425

pci_config_put32(hdl, i << 2, state->ts_cfg_data[i]);

usr/src/uts/common/io/ib/adapters/tavor/tavor.c

2641

(void) pci_config_put32(hdl, offset, addr << 16);

usr/src/uts/common/io/ib/adapters/tavor/tavor_ioctl.c

1969

pci_config_put32(pci_config_hdl, TAVOR_HW_FLASH_CFG_ADDR, addr);

usr/src/uts/common/io/ib/adapters/tavor/tavor_ioctl.c

1987

pci_config_put32(pci_config_hdl, TAVOR_HW_FLASH_CFG_ADDR, addr);

usr/src/uts/common/io/ib/adapters/tavor/tavor_ioctl.c

1988

pci_config_put32(pci_config_hdl, TAVOR_HW_FLASH_CFG_DATA, data);

usr/src/uts/common/io/myri10ge/drv/myri10ge.c

4863

pci_config_put32(handle, mgp->vso + 0x18, 0xfffffff0);

usr/src/uts/common/io/myri10ge/drv/myri10ge.c

5664

pci_config_put32(handle, ptr + PCI_MSI_ADDR_OFFSET,

usr/src/uts/common/io/myri10ge/drv/myri10ge.c

5666

pci_config_put32(handle, ptr + PCI_MSI_ADDR_OFFSET + 4,

usr/src/uts/common/io/myri10ge/drv/myri10ge.c

5706

pci_config_put32(handle, i*4, mgp->pci_saved_state.base[i]);

usr/src/uts/common/io/myri10ge/drv/myri10ge.c

5802

pci_config_put32(handle, PCI_CONF_COMM,

usr/src/uts/common/io/nge/nge_chip.c

167

pci_config_put32(ngep->cfg_handle, regno, regval);

usr/src/uts/common/io/nge/nge_chip.c

625

pci_config_put32(handle, PCI_CONF_HT_INTERNAL,

usr/src/uts/common/io/nge/nge_chip.c

642

pci_config_put32(handle, PCI_CONF_HT_MSI_MASK,

usr/src/uts/common/io/nge/nge_chip.c

649

pci_config_put32(handle, PCI_CONF_HT_MSI_MAP_CAP,

usr/src/uts/common/io/nge/nge_chip.c

656

pci_config_put32(handle, PCI_CONF_HT_INTERNAL,

usr/src/uts/common/io/ntxn/unm_gem.c

1121

pci_config_put32(pcihdl, 0xC8, c8c9value);

usr/src/uts/common/io/ntxn/unm_gem.c

370

pci_config_put32(pci_cfg_hdl, 0xd8, pexsizes);

usr/src/uts/common/io/ntxn/unm_nic_main.c

1971

pci_config_put32(conf_handle,

usr/src/uts/common/io/nxge/nxge_main.c

7097

pci_config_put32(nxgep->dev_regs->nxge_pciregh,

usr/src/uts/common/io/nxge/nxge_main.c

7148

pci_config_put32(dev_regs->nxge_pciregh, PCI_REPLAY_TIMEOUT_CFG_OFFSET,

usr/src/uts/common/io/pci_cap.c

324

pci_config_put32(h, offset, data);

usr/src/uts/common/io/pciex/hotplug/pciehpc.c

1205

pci_config_put32(bus_p->bus_cfg_hdl, off, val);

usr/src/uts/common/io/pciex/hotplug/pcishpc.c

2406

pci_config_put32(bus_p->bus_cfg_hdl,

usr/src/uts/common/io/qede/qede_gld.c

1402

pci_config_put32(qede->pci_cfg_handle, addr, *(uint32_t *)data1->uabc);

usr/src/uts/common/io/rge/rge_chip.c

1712

pci_config_put32(rgep->cfg_handle, regno, regval);

usr/src/uts/common/io/rtls/rtls.c

359

pci_config_put32(pci_handle, PCI_CONF_COMM, pci_commond);

usr/src/uts/common/io/rtls/rtls.c

428

pci_config_put32(pci_handle, PCI_CONF_COMM, pci_commond);

usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c

2568

pci_config_put32(pci_conf_handle, NV_SATA_CFG_20,

usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c

2581

pci_config_put32(pci_conf_handle, NV_SATA_CFG_23,

usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c

2611

pci_config_put32(pci_conf_handle, NV_SATA_CFG_42,

usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c

2669

pci_config_put32(pci_conf_handle, NV_SATA_CFG_20,

usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c

832

pci_config_put32(pci_conf_handle, NV_SATA_CFG_20,

usr/src/uts/common/io/sfe/sfe_util.c

5327

pci_config_put32(conf_handle, pci_cap_ptr + PCI_PMCSR, pmcsr);

usr/src/uts/common/io/usb/hcd/ehci/ehci_util.c

1476

pci_config_put32(ehcip->ehci_config_handle, extended_cap_offset,

usr/src/uts/common/io/usb/hcd/xhci/xhci_quirks.c

71

pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_USB3_PSSEN,

usr/src/uts/common/io/usb/hcd/xhci/xhci_quirks.c

76

pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_XUSB2PR,

usr/src/uts/common/io/xge/drv/xge_osdep.h

314

pci_config_put32(cfgh, where, val)

usr/src/uts/common/io/yge/yge.c

1222

pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);

usr/src/uts/common/io/yge/yge.c

1771

pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);

usr/src/uts/common/io/yge/yge.c

602

pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, val);

usr/src/uts/common/io/yge/yge.c

613

pci_config_put32(dev->d_pcih, PCI_OUR_REG_3, 0);

usr/src/uts/common/io/yge/yge.c

619

pci_config_put32(dev->d_pcih, PCI_OUR_REG_4, our);

usr/src/uts/common/io/yge/yge.c

624

pci_config_put32(dev->d_pcih, PCI_OUR_REG_5, our);

usr/src/uts/common/io/yge/yge.c

626

pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, 0);

usr/src/uts/common/io/yge/yge.c

660

pci_config_put32(dev->d_pcih, PCI_OUR_REG_1, val);

usr/src/uts/common/io/yge/yge.c

747

pci_config_put32(pcih, PCI_OUR_REG_1, val);

usr/src/uts/common/os/pcifm.c

165

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/pcifm.c

256

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/pcifm.c

270

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/pcifm.c

275

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/pcifm.c

292

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/pcifm.c

304

pci_config_put32(erpt_p->pe_hdl,

usr/src/uts/common/os/sunpci.c

693

pci_config_put32(confhdl, offset, *regbuf);

usr/src/uts/common/os/sunpci.c

737

pci_config_put32(confhdl, offset, *p);

usr/src/uts/common/os/sunpci.c

775

pci_config_put32(confhdl, PCI_CONF_BASE0, chs_p->chs_base0);

usr/src/uts/common/os/sunpci.c

776

pci_config_put32(confhdl, PCI_CONF_BASE1, chs_p->chs_base1);

usr/src/uts/common/os/sunpci.c

777

pci_config_put32(confhdl, PCI_CONF_BASE2, chs_p->chs_base2);

usr/src/uts/common/os/sunpci.c

778

pci_config_put32(confhdl, PCI_CONF_BASE3, chs_p->chs_base3);

usr/src/uts/common/os/sunpci.c

779

pci_config_put32(confhdl, PCI_CONF_BASE4, chs_p->chs_base4);

usr/src/uts/common/os/sunpci.c

780

pci_config_put32(confhdl, PCI_CONF_BASE5, chs_p->chs_base5);

usr/src/uts/common/sys/sunddi.h

2033

pci_config_put32(ddi_acc_handle_t handle, off_t offset, uint32_t value);

usr/src/uts/i86pc/io/apix/apix.c

1701

pci_config_put32(handle, msi_mask_off, (uint32_t)-1);

usr/src/uts/i86pc/io/apix/apix.c

1712

pci_config_put32(handle, msi_mask_off, msi_pvm);

usr/src/uts/i86pc/io/apix/apix_utils.c

353

pci_config_put32(handle,

usr/src/uts/i86pc/io/apix/apix_utils.c

356

pci_config_put32(handle,

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

1852

pci_config_put32(handle, cap_ptr + PCI_MSI_ADDR_OFFSET, 0);

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

1857

pci_config_put32(handle,

usr/src/uts/i86pc/io/pcplusmp/apic_introp.c

116

pci_config_put32(handle,

usr/src/uts/i86pc/io/pcplusmp/apic_introp.c

120

pci_config_put32(handle,

usr/src/uts/i86pc/io/pcplusmp/apic_introp.c

598

pci_config_put32(handle, msi_mask_off, (uint32_t)-1);

usr/src/uts/i86pc/io/pcplusmp/apic_introp.c

629

pci_config_put32(handle, msi_mask_off, msi_pvm);

usr/src/uts/i86pc/os/cmi_hw.c

2012

pci_config_put32(hdl, (off_t)reg, val);

usr/src/uts/intel/io/amdzen/amdzen.c

279

pci_config_put32(stub->azns_cfgspace, reg, val);

usr/src/uts/intel/io/amr/amrreg.h

636

#define AMR_QPUT_IDB(sc, val) pci_config_put32(sc->regsmap_handle, \

usr/src/uts/intel/io/amr/amrreg.h

640

#define AMR_QPUT_ODB(sc, val) pci_config_put32(sc->regsmap_handle, \

usr/src/uts/intel/io/dktp/controller/ata/sil3xxx.h

80

pci_config_put32(handle, PCI_CONF_BA5_IND_ADDRESS, address); \

usr/src/uts/intel/io/dktp/controller/ata/sil3xxx.h

81

pci_config_put32(handle, PCI_CONF_BA5_IND_ACCESS, value); \

usr/src/uts/intel/io/dktp/controller/ata/sil3xxx.h

86

pci_config_put32(handle, PCI_CONF_BA5_IND_ADDRESS, address); \

usr/src/uts/intel/io/dnet/dnet.c

461

pci_config_put32(handle, PCI_CONF_COMM, (csr |PCI_COMM_ME|PCI_COMM_IO));

usr/src/uts/intel/io/dnet/dnet.c

566

pci_config_put32(handle, PCI_CONF_COMM, (csr |PCI_COMM_ME|PCI_COMM_IO));

usr/src/uts/intel/io/dnet/dnet.c

570

pci_config_put32(handle, PCI_DNET_CONF_CFDD,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

1956

pci_config_put32(handle, offset,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

1971

pci_config_put32(handle, offset, io_answer);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

2102

pci_config_put32(handle, offset,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

2105

pci_config_put32(handle, offset + 4,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

2140

pci_config_put32(handle, offset,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

2167

pci_config_put32(handle, offset,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3314

pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3370

pci_config_put32(handle, PCI_BCNF_PF_LIMIT_HIGH, PCICFG_HIADDR(

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3597

pci_config_put32(config_handle, i, 0xffffffff);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3638

pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3682

pci_config_put32(config_handle, i, 0xffffffff);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3684

pci_config_put32(config_handle, i, base);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3739

pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

3741

pci_config_put32(config_handle, PCI_CONF_ROM, base);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

4037

pci_config_put32(h, PCI_BCNF_PF_BASE_HIGH,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

4048

pci_config_put32(h, PCI_BCNF_PF_LIMIT_HIGH,

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

4501

pci_config_put32(h, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

4503

pci_config_put32(h, PCI_BCNF_PF_LIMIT_HIGH, 0);

usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c

4512

pci_config_put32(h, PCI_BCNF_PF_LIMIT_HIGH,

usr/src/uts/intel/io/mc-amd/mcamd_pcicfg.c

92

pci_config_put32(hdlp->cfh_hdl, offset, val);

usr/src/uts/intel/io/pciex/pcieb_x86.c

505

pci_config_put32(cfg_hdl, reg->offset, value);

usr/src/uts/intel/io/pciex/pcieb_x86.c

602

pci_config_put32(bus_p->bus_cfg_hdl,

usr/src/uts/intel/io/vmm/io/ppt.c

211

pci_config_put32(cfg, cio.pci_off, cio.pci_data);

usr/src/uts/sun4/io/pcicfg.c

2008

pci_config_put32(handle,

usr/src/uts/sun4/io/pcicfg.c

2023

pci_config_put32(handle, offset, io_answer);

usr/src/uts/sun4/io/pcicfg.c

2148

pci_config_put32(handle,

usr/src/uts/sun4/io/pcicfg.c

2152

pci_config_put32(handle, offset + 4,

usr/src/uts/sun4/io/pcicfg.c

2181

pci_config_put32(handle,

usr/src/uts/sun4/io/pcicfg.c

2203

pci_config_put32(handle,

usr/src/uts/sun4/io/pcicfg.c

3873

pci_config_put32(handle, PCI_BCNF_PF_BASE_LOW, 0x0000ffff);

usr/src/uts/sun4/io/pcicfg.c

3874

pci_config_put32(handle, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);

usr/src/uts/sun4/io/pcicfg.c

3875

pci_config_put32(handle, PCI_BCNF_PF_LIMIT_HIGH, 0x0);

usr/src/uts/sun4/io/pcicfg.c

4210

pci_config_put32(config_handle, i, 0xffffffff);

usr/src/uts/sun4/io/pcicfg.c

4253

pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe);

usr/src/uts/sun4/io/pcicfg.c

4497

pci_config_put32(h, PCI_CONF_ROM, 0xfffffffe);

usr/src/uts/sun4/io/pcicfg.c

4801

pci_config_put32(config_handle, i, 0xffffffff);

usr/src/uts/sun4/io/pcicfg.c

4803

pci_config_put32(config_handle, i, base);

usr/src/uts/sun4/io/pcicfg.c

4860

pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe);

usr/src/uts/sun4/io/pcicfg.c

4862

pci_config_put32(config_handle, PCI_CONF_ROM, base);

usr/src/uts/sun4/io/pcicfg.c

5205

pci_config_put32(h, PCI_BCNF_PF_BASE_LOW, 0x0000ffff);

usr/src/uts/sun4/io/pcicfg.c

5206

pci_config_put32(h, PCI_BCNF_PF_BASE_HIGH, 0xffffffff);

usr/src/uts/sun4/io/pcicfg.c

5207

pci_config_put32(h, PCI_BCNF_PF_LIMIT_HIGH, 0x0);

usr/src/uts/sun4/io/pcicfg.c

6025

pci_config_put32(h, i, 0xffffffff);

usr/src/uts/sun4/io/pcicfg.c

6122

pci_config_put32(h, PCI_CONF_ROM,

usr/src/uts/sun4u/io/pci/db21554.c

1037

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1050

pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_IO_MEM1_TR_BASE,

usr/src/uts/sun4u/io/pci/db21554.c

1054

pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_MEM2_TR_BASE,

usr/src/uts/sun4u/io/pci/db21554.c

1058

pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_DS_MEM3_TR_BASE,

usr/src/uts/sun4u/io/pci/db21554.c

1062

pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_US_IO_MEM0_TR_BASE,

usr/src/uts/sun4u/io/pci/db21554.c

1066

pci_config_put32(dbp->conf_handle, (off_t)DB_CONF_US_MEM1_TR_BASE,

usr/src/uts/sun4u/io/pci/db21554.c

1286

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1296

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1299

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1308

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1318

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1320

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1333

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1344

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1347

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1358

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1368

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pci/db21554.c

1370

pci_config_put32(dbp->conf_handle,

usr/src/uts/sun4u/io/pmubus.c

561

pci_config_put32(softsp->pmubus_reghdl, offset, tmp);

usr/src/uts/sun4u/io/pmubus.c

569

pci_config_put32(softsp->pmubus_reghdl, offset, value);