usr/src/uts/common/io/1394/adapters/hci1394_attach.c

439

&soft_state->pci_config);

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

464

global_swap = pci_config_get32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

470

pci_config_put32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

474

global_swap = pci_config_get32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

516

(uint_t)pci_config_get16(soft_state->pci_config, PCI_CONF_VENID);

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

518

(uint_t)pci_config_get16(soft_state->pci_config, PCI_CONF_DEVID);

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

520

(uint_t)pci_config_get8(soft_state->pci_config, PCI_CONF_REVID);

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

548

global_swap = pci_config_get32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_attach.c

553

pci_config_put32(soft_state->pci_config,

usr/src/uts/common/io/1394/adapters/hci1394_detach.c

231

pci_config_teardown(&soft_state->pci_config);

usr/src/uts/common/io/1394/adapters/hci1394_ohci.c

133

cmdreg = pci_config_get16(soft_state->pci_config, PCI_CONF_COMM);

usr/src/uts/common/io/1394/adapters/hci1394_ohci.c

137

pci_config_put16(soft_state->pci_config, PCI_CONF_COMM, cmdreg);

usr/src/uts/common/io/bnx/570x/common/include/5706_reg.h

13566

pci_config_t pci_config;

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

100

REG_WR(pdev, pci_config.pcicfg_reg_window, val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

238

REG_RD(pdev, pci_config.pcicfg_int_ack_cmd, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

240

REG_WR(pdev, pci_config.pcicfg_int_ack_cmd, val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

247

REG_WR(pdev, pci_config.pcicfg_int_ack_cmd, val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

274

REG_RD(pdev, pci_config.pcicfg_int_ack_cmd, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

276

REG_WR(pdev, pci_config.pcicfg_int_ack_cmd, val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

355

REG_WR(pdev, pci_config.pcicfg_reg_window_address, reg_offset);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

356

REG_RD(pdev, pci_config.pcicfg_reg_window, buf_ptr);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

440

REG_WR(pdev, pci_config.pcicfg_reg_window_address, reg_offset);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

441

REG_WR(pdev, pci_config.pcicfg_reg_window, *data_ptr);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

71

REG_WR(pdev, pci_config.pcicfg_reg_window_address, offset);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

72

REG_RD(pdev, pci_config.pcicfg_reg_window, ret);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c

99

REG_WR(pdev, pci_config.pcicfg_reg_window_address, offset);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c

3957

pci_config.pcicfg_status_bit_set_cmd,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c

3966

pci_config.pcicfg_status_bit_clear_cmd,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1522

REG_RD(pdev, pci_config.pcicfg_msix_control, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1537

pci_config.pcicfg_msi_control,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1542

pci_config.pcicfg_msi_control,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1593

pci_config.pcicfg_msi_control,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1597

pci_config.pcicfg_msi_control,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1978

OFFSETOF(reg_space_t, pci_config.pcicfg_pcix_cap_id),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

1983

OFFSETOF(reg_space_t, pci_config.pcicfg_pcix_cap_id),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

465

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

470

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

486

OFFSETOF(reg_space_t, pci_config.pcicfg_device_control),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

554

pci_config.pcicfg_misc_config,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

577

REG_RD(pdev, pci_config.pcicfg_misc_config, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

619

pci_config.pcicfg_misc_config,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

627

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c

632

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

3955

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

3964

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

4182

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

4190

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

4371

pci_config.pcicfg_status_bit_set_cmd,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

4378

pci_config.pcicfg_status_bit_clear_cmd,

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

5312

REG_RD(pdev,pci_config.pcicfg_device_control,&pci_devctl);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

5314

REG_WR(pdev,pci_config.pcicfg_device_control,pci_devctl);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

5357

REG_RD(pdev, pci_config.pcicfg_vendor_id, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

562

OFFSETOF(reg_space_t, pci_config.pcicfg_vendor_id),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

578

OFFSETOF(reg_space_t, pci_config.pcicfg_subsystem_vendor_id),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

594

OFFSETOF(reg_space_t, pci_config.pcicfg_int_line),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

610

OFFSETOF(reg_space_t, pci_config.pcicfg_cache_line_size),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

626

OFFSETOF(reg_space_t, pci_config.pcicfg_class_code),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

639

OFFSETOF(reg_space_t, pci_config.pcicfg_bar_1),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

656

OFFSETOF(reg_space_t, pci_config.pcicfg_bar_2),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

674

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

694

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

706

OFFSETOF(reg_space_t, pci_config.pcicfg_misc_config),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

773

REG_RD(pdev, pci_config.pcicfg_misc_status, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

791

REG_RD(pdev, pci_config.pcicfg_pci_clock_control_bits, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

847

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

874

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

882

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

889

OFFSETOF(reg_space_t, pci_config.pcicfg_command),

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

929

REG_RD(pdev, pci_config.pcicfg_link_capability, &val);

usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c

945

REG_RD(pdev, pci_config.pcicfg_link_status, &val);

usr/src/uts/common/io/bnx/bnx_mm.h

37

REG_RD((_lmdevice), pci_config.pcicfg_int_ack_cmd, &dummy); \

usr/src/uts/common/io/bnx/bnxint.c

200

REG_RD(lmdevice, pci_config.pcicfg_misc_status, &value32);

usr/src/uts/common/io/bnx/bnxint.c

212

REG_WR(lmdevice, pci_config.pcicfg_int_ack_cmd,

usr/src/uts/common/io/bnx/bnxint.c

231

REG_WR(lmdevice, pci_config.pcicfg_int_ack_cmd, value32);

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c

353

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c

360

OFFSETOF(reg_space_t, pci_config.pcicfg_pm_csr),

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

139

xge_hal_mgmt_pci_config_t *pci_config, int size);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

689

xge_hal_mgmt_pci_config_t *pci_config, int size)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

708

xge_os_memcpy(pci_config, &hldev->pci_config_space,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1170

xge_hal_mgmt_pci_config_t pci_config;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1175

status = xge_hal_mgmt_pci_config(devh, &pci_config,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1181

__HAL_AUX_ENTRY("vendor_id", pci_config.vendor_id, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1182

__HAL_AUX_ENTRY("device_id", pci_config.device_id, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1183

__HAL_AUX_ENTRY("command", pci_config.command, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1184

__HAL_AUX_ENTRY("status", pci_config.status, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1185

__HAL_AUX_ENTRY("revision", pci_config.revision, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1186

__HAL_AUX_ENTRY("pciClass1", pci_config.pciClass[0], "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1187

__HAL_AUX_ENTRY("pciClass2", pci_config.pciClass[1], "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1188

__HAL_AUX_ENTRY("pciClass3", pci_config.pciClass[2], "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1190

pci_config.cache_line_size, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1191

__HAL_AUX_ENTRY("latency_timer", pci_config.latency_timer, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1192

__HAL_AUX_ENTRY("header_type", pci_config.header_type, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1193

__HAL_AUX_ENTRY("bist", pci_config.bist, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1194

__HAL_AUX_ENTRY("base_addr0_lo", pci_config.base_addr0_lo, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1195

__HAL_AUX_ENTRY("base_addr0_hi", pci_config.base_addr0_hi, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1196

__HAL_AUX_ENTRY("base_addr1_lo", pci_config.base_addr1_lo, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1197

__HAL_AUX_ENTRY("base_addr1_hi", pci_config.base_addr1_hi, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1199

pci_config.not_Implemented1, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1200

__HAL_AUX_ENTRY("not_Implemented2", pci_config.not_Implemented2,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1202

__HAL_AUX_ENTRY("cardbus_cis_pointer", pci_config.cardbus_cis_pointer,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1204

__HAL_AUX_ENTRY("subsystem_vendor_id", pci_config.subsystem_vendor_id,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1206

__HAL_AUX_ENTRY("subsystem_id", pci_config.subsystem_id, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1207

__HAL_AUX_ENTRY("rom_base", pci_config.rom_base, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1209

pci_config.capabilities_pointer, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1210

__HAL_AUX_ENTRY("interrupt_line", pci_config.interrupt_line, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1211

__HAL_AUX_ENTRY("interrupt_pin", pci_config.interrupt_pin, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1212

__HAL_AUX_ENTRY("min_grant", pci_config.min_grant, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1213

__HAL_AUX_ENTRY("max_latency", pci_config.max_latency, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1214

__HAL_AUX_ENTRY("msi_cap_id", pci_config.msi_cap_id, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1215

__HAL_AUX_ENTRY("msi_next_ptr", pci_config.msi_next_ptr, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1216

__HAL_AUX_ENTRY("msi_control", pci_config.msi_control, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1217

__HAL_AUX_ENTRY("msi_lower_address", pci_config.msi_lower_address,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1219

__HAL_AUX_ENTRY("msi_higher_address", pci_config.msi_higher_address,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1221

__HAL_AUX_ENTRY("msi_data", pci_config.msi_data, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1222

__HAL_AUX_ENTRY("msi_unused", pci_config.msi_unused, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1223

__HAL_AUX_ENTRY("vpd_cap_id", pci_config.vpd_cap_id, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1224

__HAL_AUX_ENTRY("vpd_next_cap", pci_config.vpd_next_cap, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1225

__HAL_AUX_ENTRY("vpd_addr", pci_config.vpd_addr, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1226

__HAL_AUX_ENTRY("vpd_data", pci_config.vpd_data, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1227

__HAL_AUX_ENTRY("pcix_cap", pci_config.pcix_cap, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1228

__HAL_AUX_ENTRY("pcix_next_cap", pci_config.pcix_next_cap, "0x%02X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1229

__HAL_AUX_ENTRY("pcix_command", pci_config.pcix_command, "0x%04X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1230

__HAL_AUX_ENTRY("pcix_status", pci_config.pcix_status, "0x%08X");

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1235

__HAL_AUX_ENTRY(key, *((int *)pci_config.rsvd_b1 + i), "0x%08X");

usr/src/uts/common/sys/1394/adapters/hci1394_state.h

87

ddi_acc_handle_t pci_config;