nxge_is_phy_present
if (nxge_is_phy_present(nxgep, ALT_GOA_CLAUSE45_PORT1_ADDR,
if (nxge_is_phy_present(nxgep, GOA_CLAUSE45_PORT_ADDR_BASE + portn,
if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT0_ADDR0,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT0_ADDR1,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT0_ADDR2,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT0_ADDR3,
if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT1_ADDR0,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT1_ADDR1,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT1_ADDR2,
} else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT1_ADDR3,
static boolean_t nxge_is_phy_present(p_nxge_t, int, uint32_t, uint32_t);