nvlist_add_uint16
int nvlist_add_uint16(nvlist_t *, const char *, uint16_t);
rv = nvlist_add_uint16(nv, name, *(uint16_t *)data);
if (nvlist_add_uint16(nvl, name, val) != 0) {
if (nvlist_add_uint16(nvl, BE_ATTR_INSTALL_FLAGS, flags) != 0) {
res = nvlist_add_uint16(*nvlp, name, port);
res = nvlist_add_uint16(*nvlp,
res = nvlist_add_uint16(*nvlp,
res = nvlist_add_uint16(*nvlp, name, u16);
errno = nvlist_add_uint16(nvl, (char *)dlm->dlm_name,
(void) nvlist_add_uint16(erpt, PCI_CONFIG_STATUS, data->pci_err_status);
(void) nvlist_add_uint16(erpt, PCI_CONFIG_COMMAND, data->pci_cfg_comm);
(void) nvlist_add_uint16(erpt, PCI_SEC_CONFIG_STATUS,
(void) nvlist_add_uint16(erpt, PCI_BCNTRL, data->pci_bdg_ctrl);
(void) nvlist_add_uint16(erpt, PCI_SEC_CONFIG_STATUS,
(void) nvlist_add_uint16(erpt, PCI_BCNTRL, data->pci_bdg_ctrl);
(void) nvlist_add_uint16(erpt, PCIEX_DEVSTS_REG, data->pcie_err_status);
(void) nvlist_add_uint16(erpt, "pcie_slot_control",
(void) nvlist_add_uint16(erpt, "pcie_slot_status",
(void) nvlist_add_uint16(erpt, PCIEX_DEVSTS_REG, data->pcie_err_status);
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID,
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID, 0);
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID,
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID, 0);
(void) nvlist_add_uint16(erpt, PCIX_COMMAND,
(void) nvlist_add_uint16(erpt, PCIX_COMMAND,
(void) nvlist_add_uint16(erpt, PCIX_SEC_STATUS,
(void) nvlist_add_uint16(erpt, PCIX_SEC_STATUS,
(void) nvlist_add_uint16(erpt, PCIX_SEC_STATUS,
(void) nvlist_add_uint16(erpt, PCIX_SEC_STATUS,
(void) nvlist_add_uint16(erpt, PCIEX_DEVSTS_REG, data->pcie_err_status);
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID,
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID,
(void) nvlist_add_uint16(erpt, PCIEX_SRC_ID, data->bdf);
ret = nvlist_add_uint16(*nvl, "tag", tpgt->tpgt_tag);
VERIFY0(nvlist_add_uint16(nvl, name, val));
nvlist_add_uint16(nvl,
if (nvlist_add_uint16(nvl, "length", log_length) != 0) {
if (nvlist_add_uint16(nvl, "invalid-param-code",
err = nvlist_add_uint16(nvl, name,
err |= nvlist_add_uint16(fmri, FM_FMRI_CPU_CACHE_BIT,
nvlist_add_uint16(nvl, (char *)name, (uint16_t)val) != 0) {
(void) nvlist_add_uint16(nv, path,
ret = nvlist_add_uint16(req->add_nvl, UI2C_IOCTL_NVL_TYPE,
ret = nvlist_add_uint16(req->add_nvl, UI2C_IOCTL_NVL_ADDR,
if ((ret = nvlist_add_uint16(nvl, NVME_NVL_CI_MAJOR,
(ret = nvlist_add_uint16(nvl, NVME_NVL_CI_MINOR,
if ((ret = nvlist_add_uint16(nvl, NVME_NVL_CI_PCI_VID,
(ret = nvlist_add_uint16(nvl, NVME_NVL_CI_PCI_DID,
(ret = nvlist_add_uint16(nvl, NVME_NVL_CI_PCI_SUBVID,
(ret = nvlist_add_uint16(nvl, NVME_NVL_CI_PCI_SUBSYS,
rv = nvlist_add_uint16(nv, key, *(uint16_t *)value);
if (nvlist_add_uint16(beAttrs, BE_ATTR_DESTROY_FLAGS, destroy_flags)
if (nvlist_add_uint16(beAttrs, BE_ATTR_UNMOUNT_FLAGS, unmount_flags)
rc |= nvlist_add_uint16(nvl, "t_priority_rank",
if ((ret = nvlist_add_uint16(nvp, varpd_direct_props[1],
(void) nvlist_add_uint16(of->dh_nvlist,
(void) nvlist_add_uint16(of->dh_nvlist,
(void) nvlist_add_uint16(of->dh_nvlist,
if ((rc = nvlist_add_uint16(nvlp, IPGPC_SPORT,
if ((rc = nvlist_add_uint16(nvlp, IPGPC_SPORT_MASK,
if ((rc = nvlist_add_uint16(nvlp, IPGPC_DPORT,
if ((rc = nvlist_add_uint16(nvlp, IPGPC_DPORT_MASK,
ret = nvlist_add_uint16(payload, name,
error = nvlist_add_uint16(*ev_attr_list, name,
int nvlist_add_uint16(nvlist_t *, const char *, uint16_t);
(void) nvlist_add_uint16(*nvlp, FM_PHYSCPU_INFO_SMBIOS_ID,
nvlist_add_uint16(nvl, VLDS_VER_MAJOR, ver->major) ||
nvlist_add_uint16(nvl, VLDS_VER_MINOR, ver->minor) ||