DEBUG3
DEBUG3("rmtd: %c %s %s\n", key, op, count);
DEBUG3("hpc_install_event_handler: handle=%x, mask=%x, arg=%x",
DEBUG3(("ldtermrput: M_CTL received\n"));
DEBUG3((
DEBUG3(("ldtermrput: M_CTL Query Reply\n"));
DEBUG3(("No information in Query Message\n"));
DEBUG3(("ldtermrput: M_CTL GrandScheme\n"));
DEBUG3(("Incorrect query replysize\n"));
DEBUG3(("Unknown M_CTL Message\n"));
DEBUG3("pcicfg: checking device %x,%x for indirect map. rc=%d\n",
DEBUG3("pcicfg: ntbridge child range: space=%x, base=%lx, len=%lx\n",
DEBUG3("64 addr = [0x%x.0x%x] len [0x%x]\n",
DEBUG3("32 addr = [0x%x.0x%x] len [0x%x]\n",
DEBUG3("I/O addr = [0x%x.0x%x] len [0x%x]\n",
DEBUG3("hole found. start %llx, len %llx, req=0x%x\n",
DEBUG3("Free PF Memory base/length = "
DEBUG3("Free Memory base/length"
DEBUG3("Returned 0x%x of IO space @ 0x%x from "
DEBUG3("updating BAR@off %x with %x,%x\n", reg_offset, hiword, size);
DEBUG3("updating BAR@off %x with %x,%x\n", reg_offset, hiword, size);
DEBUG3("Setting bridge bus-range %d,%d,%d\n", primary, secondary,
DEBUG3("--Bridge found bus [0x%x] device[0x%x] func [0x%x]\n",
DEBUG3("--Leaf device found bus [0x%x] device"
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]\n",
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]"
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]"
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]\n",
DEBUG3("Bridge Memory Allocated [0x%x.%x] len [0x%x]\n",
DEBUG3("Bridge IO Space Allocated [0x%x.%x] len [0x%x]\n",
DEBUG3("Bridge PF Memory Allocated [0x%x.%x] len [0x%x]\n",
DEBUG3("No Device at bus [0x%x]"
DEBUG3("Failed to configure bus "
DEBUG3("Memory space consumed by bridge more "
DEBUG3("IO space consumed by bridge more than"
DEBUG3("PF Memory space consumed by bridge"
DEBUG3("Buses consumed by bridge more "
DEBUG3("Memory space required by bridge more "
DEBUG3("IO space required by bridge more than"
DEBUG3("PF Memory space required by bridge"
DEBUG3("Bus numbers required by bridge more "
DEBUG3("no device : bus "
DEBUG3("configure: bus => [%d] "
DEBUG3("pcicfg: checking device %x,%x for indirect map. rc=%d\n",
DEBUG3("pcicfg: ntbridge child range: space=%x, base=%lx, len=%lx\n",
DEBUG3("64 addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("32 addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("I/O addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("hole found. start %llx, len %llx, req=%x\n",
DEBUG3("Free Memory base/length = "
DEBUG3("updating BAR@off %x with %x,%x\n", reg_offset, hiword, size);
DEBUG3("Setting bridge bus-range %d,%d,%d\n", primary, secondary,
DEBUG3("--Bridge found bus [0x%x] device"
DEBUG3("--Leaf device found bus [0x%x] device"
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]\n",
DEBUG3("--Bridge found bus [0x%x] device"
DEBUG3("--Leaf device found bus [0x%x] device"
DEBUG3("pci_fc_ops_alloc_handle ap=%lx "
DEBUG3("Before int DIP=%lx binding name %s major %d\n",
DEBUG3("DIP=%lx binding name %s major %d\n", new_child,
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("BASE register [0x%x] asks for [0x%x]=[0x%x]\n",
DEBUG3("Bridge Memory Allocated [0x%x.%x] len [0x%x]\n",
DEBUG3("Bridge IO Space Allocated [0x%x.%x] len [0x%x]\n",
DEBUG3("No Device at bus [0x%x]"
DEBUG3("Failed to configure bus "
DEBUG3("Start of Unallocated Bridge(%d slots) Resources "
DEBUG3("Memory space consumed by bridge"
DEBUG3("IO space consumed by bridge"
DEBUG3("Buses consumed by bridge"
DEBUG3("Memory space required by bridge"
DEBUG3("IO space required by bridge"
DEBUG3("Bus numbers required by bridge"
DEBUG3("mem_end %lx, io_end %lx, highest_bus %x\n",
DEBUG3("%s#%d has %d slots",
DEBUG3("pcicfg_fcode_assign_bars :"
DEBUG3("BASE register [0x%x] asks for "
DEBUG3("ROM addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("pcicfg_alloc_new_resources"
DEBUG3("pcicfg_alloc_new_resources"
DEBUG3("ROM addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("64 addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("32 addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("I/O addr = [0x%x.%x] len [0x%x]\n",
DEBUG3("Configuring [0x%x][0x%x][0x%x]\n",
DEBUG3("no device : bus "
DEBUG3("configure: bus => [%d] "
DEBUG3(DBG_DMA_MAP, dip, "mapping - rdip=%s%d type=%s\n",
DEBUG3(DBG_DMA_FREEH, dip, "rdip=%s%d mp=%p\n",
DEBUG3(DBG_DMA_UNBINDH, dip, "rdip=%s%d, mp=%p\n",
DEBUG3(DBG_DMA_CTL, dip, "%s: rdip=%s%d\n", pci_dmactl_str[cmd],
DEBUG3(DBG_CB|DBG_CONT, NULL,
DEBUG3(DBG_CB|DBG_CONT, NULL,
DEBUG3(DBG_DMA_CTL, dip, "unknown command (%x): rdip=%s%d\n",
DEBUG3(DBG_BYPASS, mp->dmai_rdip, "cookie %p (%x pages) of total %x\n",
DEBUG3(DBG_SC|DBG_CONT, 0, "flag wait loops=%lu ticks=%lu status=%x\n",
DEBUG3(DBG_BYPASS, mp->dmai_rdip, "newwin pfn[%x-%x] %x cks\n",
DEBUG3(DBG_BYPASS, mp->dmai_rdip, "newwin pfn[%x-%x] %x cks\n",
DEBUG3(DBG_DMA_CTL, dip, "unknown command (%x): rdip=%s%d\n",
DEBUG3(DBG_DMA_ALLOCH, pci_p->pci_dip, "attrp=%p cntr_max=%x.%08x\n",
DEBUG3(DBG_DMA_MAP, dip, "pci_dma_vapfn: mp=%p pfnlst[%x]=%x\n",
DEBUG3(DBG_DMA_MAP, pci_p->pci_dip,
DEBUG3(DBG_FAST_DVMA, dip, "load index=%x: %p+%x ", index, a, len);
DEBUG3(DBG_ATTACH, dip,
DEBUG3(DBG_INTR, pci_p->pci_dip,
DEBUG3(DBG_A_INTX, dip, "pci_add_intr: rdip=%s%d ino=%x\n",
DEBUG3(DBG_R_INTX, dip, "pci_rem_intr: rdip=%s%d ino=%x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG3(DBG_MAP_WIN, dip, "iommu_map_pages: mp=%p pg[%x]=%x\n",
DEBUG3(DBG_MAP_WIN, dip,
DEBUG3(DBG_ATTACH, dip,
DEBUG3(DBG_ATTACH, dip, "iommu_preserve_tsb: kernel info\n"
DEBUG3(DBG_ATTACH | DBG_CONT, dip, "iommu_preserve_tsb: obp info "
DEBUG3(DBG_ATTACH | DBG_CONT, dip,
DEBUG3(DBG_PWR, ddi_get_parent(cdip),
DEBUG3(DBG_RELOC, rdip, "index 0x%x, vaddr 0x%llx, baseva 0x%llx\n",
DEBUG3(DBG_RELOC, rdip, "pfn remap (%d) 0x%x -> 0x%x\n",
DEBUG3(DBG_RELOC, mp->dmai_rdip,
DEBUG3(DBG_FAST_DVMA, dip, "fast remap index=%x: %p, npgs=%x", index,
DEBUG3(DBG_FAST_DVMA, dip, "remap dvma_pg %x -> pfn %x,"
DEBUG3(DBG_ATTACH, dip, "sc_create: ctrl=%x, invl=%x, sync=%x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG3(DBG_PHYS_ACC, dip,
DEBUG3(DBG_PHYS_ACC, dip,
DEBUG3(DBG_PHYS_ACC, dip,
DEBUG3(DBG_PHYS_ACC, dip,
DEBUG3(DBG_TOOLS, dip, "raw bus:0x%x, dev:0x%x, func:0x%x\n",
DEBUG3(DBG_TOOLS, dip,
DEBUG3(DBG_ATTACH, dip, "address (%p,%p,%p)\n",
DEBUG3(DBG_IB, dip, "pci_xlate_intr: bus=%x, dev=%x, intr=%x\n",
DEBUG3(DBG_DMA_MAP, iommu_p->iommu_pci_p->pci_dip,
DEBUG3(DBG_ERR_INTR, pci_p->pci_dip, "pcix_log_pbm: chip_type=%d "
DEBUG3(D_MAP, "simba_bus_map(): dip=%p, rdip=%p, mp=%p", dip, rdip, mp);
DEBUG3(D_MAP, "simba_bus_map(): offset=%lx, len=%lx, vaddrp=%p",
DEBUG3(D_DETACH, "%s%d: saving child dip=%p\n",