nb_pci_putb
nb_pci_putb(0, 21, 0, nb_chipset == INTEL_NB_5000P || \
nb_pci_putb(0, 22, 0, nb_chipset == INTEL_NB_5000P || \
#define FERR_FAT_THR_WR(val) nb_pci_putb(0, 16, 2, 0xf0, val)
#define FERR_NF_THR_WR(val) nb_pci_putb(0, 16, 2, 0xf1, val)
#define NERR_FAT_THR_WR(val) nb_pci_putb(0, 16, 2, 0xf2, val)
#define NERR_NF_THR_WR(val) nb_pci_putb(0, 16, 2, 0xf3, val)
#define CTSTS_WR(val) nb_pci_putb(0, 16, 4, 0xee, val)
nb_pci_putb(0, 17, (fsb & 2) ? 3 : 0, (fsb & 1) ? 0xd0 : 0x50, \
nb_pci_putb(0, 16, 0, fsb ? 0x490 : 0x190, 0); \
nb_pci_putb(0, 17, (fsb & 2) ? 3 : 0, (fsb & 1) ? 0xc0 : 0x40, val) : \
nb_pci_putb(0, 16, 0, fsb ? 0x480 : 0x180, val))
nb_pci_putb(0, 17, (fsb & 2) ? 3 : 0, (fsb & 1) ? 0xc1 : 0x41, val) : \
nb_pci_putb(0, 16, 0, fsb ? 0x481 : 0x181, val))
nb_pci_putb(0, 17, (fsb & 2) ? 3 : 0, (fsb & 1) ? 0xc2 : 0x42, val) : \
nb_pci_putb(0, 16, 0, fsb ? 0x482 : 0x182, val))
nb_pci_putb(0, 17, (fsb & 2) ? 3 : 0, (fsb & 1) ? 0xc3 : 0x43, val) : \
nb_pci_putb(0, 16, 0, fsb ? 0x483 : 0x183, val))
nb_pci_putb(0, 16, 2, 0xc0, \
nb_pci_putb(0, 16, 2, 0xc1, val >> 8); \
nb_pci_putb(0, 16, 2, 0xc0, val); \
nb_pci_putb(0, 16, 2, 0xc2, \
nb_pci_putb(0, 16, 2, 0xc3, val >> 8); \
nb_pci_putb(0, 16, 2, 0xc1, val); \
nb_pci_putb(0, 16, 2, 0xc4, \
nb_pci_putb(0, 16, 2, 0xc5, val >> 8); \
nb_pci_putb(0, 16, 2, 0xc2, val); \
nb_pci_putb(0, 16, 2, 0xc6, \
nb_pci_putb(0, 16, 2, 0xc7, val >> 8); \
nb_pci_putb(0, 16, 2, 0xc3, val); \
#define EMASK_5000_INT_WR(val) nb_pci_putb(0, 16, 2, 0xcc, val)
nb_pci_putb(0, 16, 2, 0xd0, val); \
nb_pci_putb(0, 16, 2, 0xd1, val); \
nb_pci_putb(0, 16, 2, 0xd2, val); \
nb_pci_putb(0, 16, 2, 0xd3, val); \
extern void nb_pci_putb(int, int, int, int, uint8_t);