msiq_rec_type
hdlp, msiq_rec_type, msi_num, msiq_id);
PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num)) != DDI_SUCCESS) {
hdlp, msiq_rec_type, msi_num, msiq_id);
hdlp->ih_pri), rdip, hdlp->ih_inum, msiq_rec_type, msi_num);
rdip, hdlp->ih_inum, msiq_rec_type, msi_num);
hdlp, msiq_rec_type, msi_num, msiq_id);
hdlp, msiq_rec_type, msi_num, old_msiq_id);
msiq_rec_type_t msiq_rec_type;
msiq_rec_type = MSI64_REC;
msiq_rec_type = MSI32_REC;
msiq_rec_type, msi_num, cpu_id, &msiq_id)) != DDI_SUCCESS) {
rec_type = msiq_rec_p->msiq_rec_type;
msiq_rec_type_t msiq_rec_type;
msiq_rec_type = MSI64_REC;
msiq_rec_type = MSI32_REC;
msiq_rec_type, msi_num, -1, &msiq_id)) != DDI_SUCCESS) {
hdlp, msiq_rec_type, msi_num, msiq_id);
hdlp, msiq_rec_type, msi_num, msiq_id);
PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num);
hdlp->ih_pri, PX_INTR_STATE_DISABLE, msiq_rec_type,
hdlp, msiq_rec_type, msi_num, msiq_id);
msiq_rec_type : 8; /* DW 0 - 07:00 */
msiq_rec_p->msiq_rec_type = MSI32_REC;
msiq_rec_p->msiq_rec_type = MSI64_REC;
msiq_rec_p->msiq_rec_type = MSG_REC;
msiq_rec_p->msiq_rec_type = 0;
if (!curr_msiq_rec_p->msiq_rec_type) {
msiq_rec_p->msiq_rec_type = 0;
curr_msiq_rec_p->msiq_rec_type = 0;