Symbol: DDI_INTR_NEXDBG
usr/src/uts/common/io/pci_intr_lib.c
1015
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: %s%d: called\n",
usr/src/uts/common/io/pci_intr_lib.c
1019
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: can't get "
usr/src/uts/common/io/pci_intr_lib.c
1025
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: "
usr/src/uts/common/io/pci_intr_lib.c
1034
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: "
usr/src/uts/common/io/pci_intr_lib.c
1040
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: "
usr/src/uts/common/io/pci_intr_lib.c
1046
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_cap: "
usr/src/uts/common/io/pci_intr_lib.c
1071
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_clr_mask: %s%d: called\n",
usr/src/uts/common/io/pci_intr_lib.c
1075
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_clr_mask: can't get "
usr/src/uts/common/io/pci_intr_lib.c
1081
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_clr_mask: "
usr/src/uts/common/io/pci_intr_lib.c
1103
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_set_mask: %s%d: called\n",
usr/src/uts/common/io/pci_intr_lib.c
1107
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_set_mask: can't get "
usr/src/uts/common/io/pci_intr_lib.c
1113
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_set_mask: "
usr/src/uts/common/io/pci_intr_lib.c
112
DDI_INTR_NEXDBG((CE_CONT, "pci_get_msi_ctrl: "
usr/src/uts/common/io/pci_intr_lib.c
1137
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_pending: %s%d: called\n",
usr/src/uts/common/io/pci_intr_lib.c
1141
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_pending: can't get "
usr/src/uts/common/io/pci_intr_lib.c
1149
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_pending: "
usr/src/uts/common/io/pci_intr_lib.c
1199
DDI_INTR_NEXDBG((CE_CONT, "pci_intx_get_iline: "
usr/src/uts/common/io/pci_intr_lib.c
125
DDI_INTR_NEXDBG((CE_CONT, "pci_get_msi_ctrl: MSI "
usr/src/uts/common/io/pci_intr_lib.c
137
DDI_INTR_NEXDBG((CE_CONT, "pci_get_msi_ctrl: MSI-X "
usr/src/uts/common/io/pci_intr_lib.c
160
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_cap: rdip = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
185
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_cap: flags = 0x%x\n", *flagsp));
usr/src/uts/common/io/pci_intr_lib.c
206
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: rdip = 0x%p type 0x%x "
usr/src/uts/common/io/pci_intr_lib.c
219
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: msi_ctrl = %x\n",
usr/src/uts/common/io/pci_intr_lib.c
225
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: msi_addr = %x\n",
usr/src/uts/common/io/pci_intr_lib.c
232
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: upper "
usr/src/uts/common/io/pci_intr_lib.c
238
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: msi_data "
usr/src/uts/common/io/pci_intr_lib.c
244
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: msi_data "
usr/src/uts/common/io/pci_intr_lib.c
271
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_configure: "
usr/src/uts/common/io/pci_intr_lib.c
299
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_unconfigure: rdip = 0x%p type 0x%x "
usr/src/uts/common/io/pci_intr_lib.c
320
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_unconfigure: msi_ctrl "
usr/src/uts/common/io/pci_intr_lib.c
364
DDI_INTR_NEXDBG((CE_CONT, "pci_is_msi_enabled: rdip = 0x%p, "
usr/src/uts/common/io/pci_intr_lib.c
398
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_enable_mode: rdip = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
422
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_enable_mode: msi_ctrl = %x\n",
usr/src/uts/common/io/pci_intr_lib.c
446
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_disable_mode: rdip = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
468
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_disable_mode: msi_ctrl = %x\n",
usr/src/uts/common/io/pci_intr_lib.c
491
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_set_mask: rdip = 0x%p, "
usr/src/uts/common/io/pci_intr_lib.c
555
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_clr_mask: rdip = 0x%p, "
usr/src/uts/common/io/pci_intr_lib.c
616
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_pending: rdip = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
627
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_pending: "
usr/src/uts/common/io/pci_intr_lib.c
673
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_nintrs: rdip = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
688
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_nintrs: "
usr/src/uts/common/io/pci_intr_lib.c
710
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_set_nintrs: rdip = 0x%p, "
usr/src/uts/common/io/pci_intr_lib.c
727
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_set_nintrs: unsupported\n"));
usr/src/uts/common/io/pci_intr_lib.c
747
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_supported_type: "
usr/src/uts/common/io/pci_intr_lib.c
764
DDI_INTR_NEXDBG((CE_CONT, "pci_msi_get_supported_type: "
usr/src/uts/common/io/pci_intr_lib.c
790
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: rdip = %p\n", (void *)rdip));
usr/src/uts/common/io/pci_intr_lib.c
819
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: MSI-X table offset 0x%x "
usr/src/uts/common/io/pci_intr_lib.c
826
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: "
usr/src/uts/common/io/pci_intr_lib.c
846
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: MSI-X rnum = %d\n", rnumber));
usr/src/uts/common/io/pci_intr_lib.c
849
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: "
usr/src/uts/common/io/pci_intr_lib.c
859
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: MSI-X Table "
usr/src/uts/common/io/pci_intr_lib.c
879
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: PBA table offset 0x%x "
usr/src/uts/common/io/pci_intr_lib.c
895
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: PBA rnum = %d\n", rnumber));
usr/src/uts/common/io/pci_intr_lib.c
898
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: "
usr/src/uts/common/io/pci_intr_lib.c
908
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: PBA "
usr/src/uts/common/io/pci_intr_lib.c
914
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_init: msix_p = 0x%p DONE!!\n",
usr/src/uts/common/io/pci_intr_lib.c
941
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_fini: msix_p = 0x%p\n",
usr/src/uts/common/io/pci_intr_lib.c
963
DDI_INTR_NEXDBG((CE_CONT, "pci_msix_dup: dip = %p, inum = 0x%x, "
usr/src/uts/common/xen/io/xpvd.c
421
DDI_INTR_NEXDBG((CE_CONT, "xpvd_get_priority: dip = 0x%p\n",
usr/src/uts/common/xen/io/xpvd.c
463
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/common/xen/io/xpvd.c
505
DDI_INTR_NEXDBG((CE_CONT, "xpvd_intr_ops: priority = 0x%x\n",
usr/src/uts/common/xen/io/xpvd.c
564
DDI_INTR_NEXDBG((CE_CONT, "xpvd: GETCAP returned = %x\n",
usr/src/uts/common/xen/io/xpvd.c
568
DDI_INTR_NEXDBG((CE_CONT, "xpvd_intr_ops: SETCAP cap=0x%x\n",
usr/src/uts/common/xen/io/xpvd.c
574
DDI_INTR_NEXDBG((CE_CONT, "GETCAP: psm_intr_ops"
usr/src/uts/common/xen/io/xpvd.c
588
DDI_INTR_NEXDBG((CE_CONT, "xpvd_intr_ops: ENABLE vec=0x%x\n",
usr/src/uts/common/xen/io/xpvd.c
596
DDI_INTR_NEXDBG((CE_CONT, "xpvd_intr_ops: DISABLE vec = %x\n",
usr/src/uts/common/xen/io/xpvd.c
628
DDI_INTR_NEXDBG((CE_CONT, "xpvd: GETPENDING returned = %x\n",
usr/src/uts/common/xen/io/xpvd.c
635
DDI_INTR_NEXDBG((CE_CONT, "xpvd: NAVAIL returned = %x\n",
usr/src/uts/common/xen/io/xpvd.c
653
DDI_INTR_NEXDBG((CE_CONT, "xpvd_enable_intr: hdlp %p inum %x\n",
usr/src/uts/common/xen/io/xpvd.c
662
DDI_INTR_NEXDBG((CE_CONT, "xpvd_enable_intr: priority=%x vector=%x\n",
usr/src/uts/common/xen/io/xpvd.c
684
DDI_INTR_NEXDBG((CE_CONT, "xpvd_disable_intr: \n"));
usr/src/uts/i86pc/io/pci/pci_common.c
164
DDI_INTR_NEXDBG((CE_CONT, "pci_get_priority: dip = 0x%p, hdlp = %p\n",
usr/src/uts/i86pc/io/pci/pci_common.c
215
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/i86pc/io/pci/pci_common.c
271
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
361
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/i86pc/io/pci/pci_common.c
382
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/i86pc/io/pci/pci_common.c
398
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/i86pc/io/pci/pci_common.c
463
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
494
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/i86pc/io/pci/pci_common.c
549
DDI_INTR_NEXDBG((CE_CONT, "pci: GETCAP returned psm_rval = %x, "
usr/src/uts/i86pc/io/pci/pci_common.c
564
DDI_INTR_NEXDBG((CE_CONT, "pci: GETCAP returned = %x\n",
usr/src/uts/i86pc/io/pci/pci_common.c
568
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
574
DDI_INTR_NEXDBG((CE_CONT, "GETCAP: psm_intr_ops"
usr/src/uts/i86pc/io/pci/pci_common.c
580
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: ENABLE\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
588
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: ENABLE "
usr/src/uts/i86pc/io/pci/pci_common.c
592
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: DISABLE\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
597
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: DISABLE "
usr/src/uts/i86pc/io/pci/pci_common.c
601
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
604
DDI_INTR_NEXDBG((CE_CONT, "BLOCKENABLE: not MSI\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
618
DDI_INTR_NEXDBG((CE_CONT, "BLOCKENABLE: "
usr/src/uts/i86pc/io/pci/pci_common.c
628
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
633
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
636
DDI_INTR_NEXDBG((CE_CONT, "BLOCKDISABLE: not MSI\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
649
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: "
usr/src/uts/i86pc/io/pci/pci_common.c
716
DDI_INTR_NEXDBG((CE_CONT, "pci: GETPENDING returned "
usr/src/uts/i86pc/io/pci/pci_common.c
729
DDI_INTR_NEXDBG((CE_CONT, "pci: GETPENDING returned = %x\n",
usr/src/uts/i86pc/io/pci/pci_common.c
733
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: GETTARGET\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
745
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: GETTARGET "
usr/src/uts/i86pc/io/pci/pci_common.c
750
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: SETTARGET\n"));
usr/src/uts/i86pc/io/pci/pci_common.c
761
DDI_INTR_NEXDBG((CE_CONT, "pci_common_intr_ops: SETTARGET "
usr/src/uts/i86pc/io/pci/pci_common.c
930
DDI_INTR_NEXDBG((CE_CONT, "pci_enable_intr: hdlp %p inum %x\n",
usr/src/uts/i86pc/io/pci/pci_common.c
947
DDI_INTR_NEXDBG((CE_CONT, "pci_enable_intr: priority=%x irq=%x\n",
usr/src/uts/i86pc/io/pci/pci_common.c
970
DDI_INTR_NEXDBG((CE_CONT, "pci_disable_intr: \n"));
usr/src/uts/i86pc/io/rootnex.c
1373
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
887
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
895
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
901
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
908
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
917
DDI_INTR_NEXDBG((CE_CONT,
usr/src/uts/intel/io/pci/pci_pci.c
929
DDI_INTR_NEXDBG((CE_CONT,