Symbol: mcamd_prop_t
usr/src/common/mc/mc-amd/mcamd_api.h
233
mcamd_propcode_t, mcamd_prop_t *);
usr/src/common/mc/mc-amd/mcamd_rowcol.c
37
mcamd_prop_t num; /* corresponding chip number */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
38
mcamd_prop_t rev; /* revision */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
39
mcamd_prop_t width; /* access width */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
40
mcamd_prop_t base; /* MC base address */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
41
mcamd_prop_t lim; /* MC limit address */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
42
mcamd_prop_t csbnkmap_reg; /* chip-select bank map */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
43
mcamd_prop_t intlven; /* Node-intlv mask */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
44
mcamd_prop_t intlvsel; /* Node-intlv selection for this node */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
45
mcamd_prop_t csintlvfctr; /* cs intlv factor on this node */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
46
mcamd_prop_t bnkswzl; /* bank-swizzle mode */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
47
mcamd_prop_t sparecs; /* spare cs#, if any */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
48
mcamd_prop_t badcs; /* substituted cs#, if any */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
52
mcamd_prop_t num; /* chip-select number */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
53
mcamd_prop_t base; /* chip-select base address */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
54
mcamd_prop_t mask; /* chip-select mask */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
55
mcamd_prop_t testfail; /* marked testFail */
usr/src/common/mc/mc-amd/mcamd_rowcol.c
556
mcamd_prop_t csnum;
usr/src/common/mc/mc-amd/mcamd_rowcol.c
56
mcamd_prop_t dimmrank; /* rank number on dimm(s) */
usr/src/uts/intel/io/mc-amd/mcamd.h
109
mcamd_prop_t mcd_num; /* dimm number */
usr/src/uts/intel/io/mc-amd/mcamd.h
110
mcamd_prop_t mcd_size; /* dimm size in bytes */
usr/src/uts/intel/io/mc-amd/mcamd.h
123
mcamd_prop_t csp_num; /* Chip-select number */
usr/src/uts/intel/io/mc-amd/mcamd.h
124
mcamd_prop_t csp_base; /* DRAM CS Base */
usr/src/uts/intel/io/mc-amd/mcamd.h
125
mcamd_prop_t csp_mask; /* DRAM CS Mask */
usr/src/uts/intel/io/mc-amd/mcamd.h
126
mcamd_prop_t csp_size; /* Chip-select bank size */
usr/src/uts/intel/io/mc-amd/mcamd.h
127
mcamd_prop_t csp_csbe; /* Chip-select bank enable */
usr/src/uts/intel/io/mc-amd/mcamd.h
128
mcamd_prop_t csp_spare; /* Spare */
usr/src/uts/intel/io/mc-amd/mcamd.h
129
mcamd_prop_t csp_testfail; /* TestFail */
usr/src/uts/intel/io/mc-amd/mcamd.h
130
mcamd_prop_t csp_dimmnums[MC_CHIP_DIMMPERCS]; /* dimm(s) in cs */
usr/src/uts/intel/io/mc-amd/mcamd.h
131
mcamd_prop_t csp_dimmrank; /* rank # on dimms */
usr/src/uts/intel/io/mc-amd/mcamd.h
157
mcamd_prop_t mcp_num; /* Associated *chip* number */
usr/src/uts/intel/io/mc-amd/mcamd.h
158
mcamd_prop_t mcp_rev; /* Chip revision (MC_REV_*) */
usr/src/uts/intel/io/mc-amd/mcamd.h
159
mcamd_prop_t mcp_base; /* base address for mc's drams */
usr/src/uts/intel/io/mc-amd/mcamd.h
160
mcamd_prop_t mcp_lim; /* limit address for mc's drams */
usr/src/uts/intel/io/mc-amd/mcamd.h
161
mcamd_prop_t mcp_ilen; /* interleave enable */
usr/src/uts/intel/io/mc-amd/mcamd.h
162
mcamd_prop_t mcp_ilsel; /* interleave select */
usr/src/uts/intel/io/mc-amd/mcamd.h
163
mcamd_prop_t mcp_csintlvfctr; /* cs bank interleave factor */
usr/src/uts/intel/io/mc-amd/mcamd.h
164
mcamd_prop_t mcp_dramhole_size; /* DRAM Hole Size */
usr/src/uts/intel/io/mc-amd/mcamd.h
165
mcamd_prop_t mcp_accwidth; /* dram access width (64 or 128) */
usr/src/uts/intel/io/mc-amd/mcamd.h
166
mcamd_prop_t mcp_csbankmapreg; /* chip-select bank mapping reg */
usr/src/uts/intel/io/mc-amd/mcamd.h
167
mcamd_prop_t mcp_bnkswzl; /* BankSwizzle enabled */
usr/src/uts/intel/io/mc-amd/mcamd.h
168
mcamd_prop_t mcp_mod64mux; /* Mismtached DIMMs support enabled */
usr/src/uts/intel/io/mc-amd/mcamd.h
169
mcamd_prop_t mcp_sparecs; /* cs# replaced by online spare */
usr/src/uts/intel/io/mc-amd/mcamd.h
170
mcamd_prop_t mcp_badcs; /* cs# replaced by online spare */
usr/src/uts/intel/io/mc-amd/mcamd_drv.c
1521
mcamd_prop_t chipid = *((mcamd_prop_t *)arg2);
usr/src/uts/intel/io/mc-amd/mcamd_subr.c
296
mcamd_propcode_t code, mcamd_prop_t *valp)
usr/src/uts/intel/io/mc-amd/mcamd_subr.c
325
mcamd_prop_t *valp;
usr/src/uts/intel/io/mc-amd/mcamd_subr.c
330
valp = va_arg(ap, mcamd_prop_t *);