mc_addr
mc_table->addr_arr[idx].mc_addr,
u8_t *mc_addr)
if(IS_ETH_ADDRESS_EQUAL(mc_entry->mc_addr, mc_addr))
COPY_ETH_ADDRESS(mc_addr, mc_entry->mc_addr);
u8_t *mc_addr)
if(IS_ETH_ADDRESS_EQUAL(mc_entry->mc_addr, mc_addr))
u8_t *mc_addr);
u8_t *mc_addr);
u8_t mc_addr[ETHERNET_ADDRESS_SIZE];
const u8_t *const mc_addr);
bnx_mc_add(um_device_t *umdevice, const uint8_t *const mc_addr)
index = bnx_find_mchash_collision(&(lmdevice->mc_table), mc_addr);
lmstatus = lm_add_mc(lmdevice, (u8_t *)mc_addr);
bnx_mc_del(um_device_t *umdevice, const uint8_t *const mc_addr)
index = bnx_find_mchash_collision(&(lmdevice->mc_table), mc_addr);
lmdevice->mc_table.addr_arr[index].mc_addr);
bnx_find_mchash_collision(lm_mc_table_t *mc_table, const uint8_t *const mc_addr)
crc32 = compute_crc32(mc_addr, ETHERNET_ADDRESS_SIZE);
crc32 = compute_crc32(mc_table->addr_arr[idx].mc_addr,
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
return e1000_hash_mc_addr_generic(hw, mc_addr);
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
(((u16) mc_addr[5]) << bit_shift)));
u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)
hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
(((u16) mc_addr[5]) << bit_shift)));
u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)
return igc_hash_mc_addr_generic(hw, mc_addr);
u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr);
u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
(((u16) mc_addr[5]) << bit_shift)));
u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr);
void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr)
vector = ixgbe_mta_vector(hw, mc_addr);
static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);
static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
xgell_m_multicst(void *arg, boolean_t add, const uint8_t *mc_addr)
uint64_t mc_addr; /* bank address, only valid
mcrp->cmr_msrval = mib->mc_addr;
uint64_t mc_addr, saf_addr;
mc_addr = ((uint64_t)regs[0]) << 32;
mc_addr |= (uint64_t)regs[1];
if ((mc_addr & saf_mask) == saf_addr)
mc_decode[i] = lddphysio(mc_addr | offset);
uint64_t mc_addr, saf_addr;
mc_addr = ((uint64_t)regs[0]) << 32;
mc_addr |= (uint64_t)regs[1];
if ((mc_addr & saf_mask) == saf_addr)
mc_decode[i] = lddphysio(mc_addr | offset);
uint64_t mc_addr, mask;
mc_addr = ((uint64_t)regs[0]) << 32;
mc_addr |= (uint64_t)regs[1];
mc_decode[i] = lddphysio((mc_addr | mask));
struct mc_addr mi_restartaddr;
uint64_t mc_addr, mask;
mc_addr = ((uint64_t)reg.regspec_addr_hi) << 32;
mc_addr |= (uint64_t)reg.regspec_addr_lo;
(mc_addr | mask));
uint64_t mc_addr, addr;
mc_addr = ((uint64_t)reg.regspec_addr_hi) << 32;
mc_addr |= (uint64_t)reg.regspec_addr_lo;
addr = SG_REG_2_OFFSET(mc) | mc_addr;
uint64_t mc_addr, mask;
mc_addr = ((uint64_t)regs[0]) << 32;
mc_addr |= (uint64_t)regs[1];
mc_decode[i] = lddphysio((mc_addr | mask));
(mc_addr) | SG_MEM_DECODE3_ADR
#define MC_ACTIVITY_STATUS(mc_addr) \
(mc_addr) | SG_EMU_ACTIVITY_STATUS
#define MC_MEMDEC0(mc_addr) \
(mc_addr) | SG_MEM_DECODE0_ADR
#define MC_MEMDEC1(mc_addr) \
(mc_addr) | SG_MEM_DECODE1_ADR
#define MC_MEMDEC2(mc_addr) \
(mc_addr) | SG_MEM_DECODE2_ADR
#define MC_MEMDEC3(mc_addr) \