lmrc_write_reg
lmrc_write_reg(lmrc, MPI2_DOORBELL_OFFSET, MFI_STOP_ADP);
lmrc_write_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
lmrc_write_reg(lmrc, MPI2_DOORBELL_OFFSET,
lmrc_write_reg(lmrc, MPI2_DOORBELL_OFFSET,
lmrc_write_reg(lmrc, MPI2_DOORBELL_OFFSET,
lmrc_write_reg(lmrc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0);
lmrc_write_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
lmrc_write_reg(lmrc,
lmrc_write_reg(lmrc, lmrc->l_rphi[reg], val);
static void lmrc_write_reg(lmrc_t *, uint32_t, uint32_t);
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,
lmrc_write_reg(lmrc, MPI2_HOST_DIAGNOSTIC_OFFSET,
lmrc_write_reg(lmrc, MPI2_WRITE_SEQUENCE_OFFSET,