lmrc_read_reg
status = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);
(void) lmrc_read_reg(lmrc, MPI2_DOORBELL_OFFSET);
uint32_t mask = lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
(void) lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
status = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);
uint32_t mask = lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
new_status = lmrc_read_reg(lmrc,
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD2_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD1_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);
(void) lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
(void) lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD1_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD3_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD1_OFFSET);
reg = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD1_OFFSET);
status = lmrc_read_reg(lmrc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
static uint32_t lmrc_read_reg(lmrc_t *, uint32_t);
uint32_t status = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);
val = lmrc_read_reg(lmrc, reg);
lmrc_read_reg(lmrc, MPI2_HOST_DIAGNOSTIC_OFFSET) |
if ((lmrc_read_reg(lmrc, MPI2_HOST_DIAGNOSTIC_OFFSET) &
if ((lmrc_read_reg(lmrc, MPI2_HOST_DIAGNOSTIC_OFFSET) &
status = lmrc_read_reg(lmrc, MPI26_SCRATCHPAD0_OFFSET);