ixgbe_log
ixgbe_log(ixgbe, "rssrk(%d): 0x%x\n",
ixgbe_log(ixgbe, "-- ral/rah --\n");
ixgbe_log(ixgbe, "ral(%d): 0x%x rah(%d): 0x%x\n",
ixgbe_log(ixgbe, "-- mta --\n");
ixgbe_log(ixgbe, "mta(%d): 0x%x\n", i, reg);
ixgbe_log(ixgbe, "-- vfta --\n");
ixgbe_log(ixgbe, "vfta(0x%x): 0x%x\n", off, reg);
ixgbe_log(ixgbe, "-- mdef --\n");
ixgbe_log(ixgbe, "mdef(%d): 0x%x\n", i, reg);
ixgbe_log(ixgbe, "%s %s\n", tag, form);
ixgbe_log(ixgbe, "Begin dump PCI config space");
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe, "ddi_dev_regsize() failed");
ixgbe_log(ixgbe, "ddi_regs_map_setup() failed");
ixgbe_log(ixgbe, "MSI-X Memory Space: (mem_size = %d, base = %x)",
ixgbe_log(ixgbe, "MSI-X Table Entry(%d):", i);
ixgbe_log(ixgbe, "lo_addr:\t%x",
ixgbe_log(ixgbe, "up_addr:\t%x",
ixgbe_log(ixgbe, "msg_data:\t%x",
ixgbe_log(ixgbe, "vct_ctrl:\t%x",
ixgbe_log(ixgbe, "MSI-X Pending Bits:\t%x",
ixgbe_log(ixgbe, "Basic IXGBE registers..");
ixgbe_log(ixgbe, "\tCTRL=%x\n", reg_val);
ixgbe_log(ixgbe, "\tSTATUS=%x\n", reg_val);
ixgbe_log(ixgbe, "\tCTRL_EXT=%x\n", reg_val);
ixgbe_log(ixgbe, "\tFCTRL=%x\n", reg_val);
ixgbe_log(ixgbe, "Some IXGBE interrupt registers..");
ixgbe_log(ixgbe, "\tGPIE=%x\n", reg_val);
ixgbe_log(ixgbe, "\tIVAR(0)=%x\n", reg_val);
ixgbe_log(ixgbe, "\tIVAR_MISC=%x\n", reg_val);
ixgbe_log(ixgbe, "Receive registers...");
ixgbe_log(ixgbe, "\tRXCTRL=%x\n", reg_val);
ixgbe_log(ixgbe, "\tRXDCTL(%d)=%x\n", hw_index, reg_val);
ixgbe_log(ixgbe, "\tSRRCTL(%d)=%x\n", hw_index, reg_val);
ixgbe_log(ixgbe, "\tRXCSUM=%x\n", reg_val);
ixgbe_log(ixgbe, "\tMRQC=%x\n", reg_val);
ixgbe_log(ixgbe, "\tRDRXCTL=%x\n", reg_val);
ixgbe_log(ixgbe, "Some transmit registers..");
ixgbe_log(ixgbe, "\tDMATXCTL=%x\n", reg_val);
ixgbe_log(ixgbe, "\tTXDCTL(%d)=%x\n", i, reg_val);
ixgbe_log(ixgbe, "\tTDWBAL(%d)=%x\n", i, reg_val);
ixgbe_log(ixgbe, "\tTDWBAH(%d)=%x\n", i, reg_val);
ixgbe_log(ixgbe, "\tTXPBSIZE(%d)=%x\n", i, reg_val);
ixgbe_log(ixgbe, "interrupt: %s\n", tag);
ixgbe_log(ixgbe, "..eims: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIMS));
ixgbe_log(ixgbe, "..eimc: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIMC));
ixgbe_log(ixgbe, "..eiac: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIAC));
ixgbe_log(ixgbe, "..eiam: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIAM));
ixgbe_log(ixgbe, "..gpie: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_GPIE));
ixgbe_log(ixgbe, "otherflag: 0x%x\n", ixgbe->capab->other_intr);
ixgbe_log(ixgbe, "eims_mask: 0x%x\n", ixgbe->eims);
ixgbe_log(ixgbe, "ivar[%d]: 0x%x\n", i, ivar);
ixgbe_log(ixgbe,
ixgbe_log(ixgbe, "rx %d ivar %d rxdctl: 0x%x srrctl: 0x%x\n",
ixgbe_log(ixgbe, "tx %d ivar %d txdctl: 0x%x\n",
ixgbe_log(ixgbe, "reta(%d): 0x%x\n",
extern void ixgbe_log(void *, const char *, ...);
ixgbe_log((adapter), (fmt))
ixgbe_log((adapter), (fmt), (d1))
ixgbe_log((adapter), (fmt), (d1), (d2))
ixgbe_log((adapter), (fmt), (d1), (d2), (d3))
ixgbe_log((adapter), (fmt), (d1), (d2), (d3), (d4), (d5), (d6))
ixgbe_log(ixgbe, "Adjust interrupts failed."
ixgbe_log(ixgbe, "Adjust interrupts failed."
ixgbe_log(ixgbe,
ixgbe_log(ixgbe, "Get interrupt cap failed: %d", rc);
ixgbe_log(ixgbe, "unhandled firmware event: 0x%x",
ixgbe_log(ixgbe, "No memory available to dispatch "
ixgbe_log(ixgbe, "No memory available to dispatch "
ixgbe_log(ixgbe, "No memory available to dispatch "
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe, "Allocate interrupts failed. "
ixgbe_log(ixgbe, "Insufficient interrupt handles available: %d",
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe,
ixgbe_log(ixgbe, "%s", ixgbe_ident);
ixgbe_log(ixgbe, "ixgbe_rx_copy: allocate buffer failed");
ixgbe_log(ixgbe, "LRO copy MP alloc failed");
void ixgbe_log(void *, const char *, ...);
ixgbe_log(ixgbe, "transceiver requires unsupported address "