usr/src/uts/sun4u/io/pci/pci_cb.c

110

DEBUG3(DBG_CB|DBG_CONT, NULL,

usr/src/uts/sun4u/io/pci/pci_cb.c

113

DEBUG2(DBG_CB|DBG_CONT, NULL, "\tPA=%016llx data=%016llx\n", pa, reg);

usr/src/uts/sun4u/io/pci/pci_cb.c

73

DEBUG3(DBG_CB|DBG_CONT, NULL,

usr/src/uts/sun4u/io/pci/pci_debug.c

71

{DBG_CB, "cb"},

usr/src/uts/sun4u/io/px/px_hlib.c

192

DBG(DBG_CB, NULL, "hvio_cb_init - unknown chip type: 0x%x\n",

usr/src/uts/sun4u/io/px/px_hlib.c

210

DBG(DBG_CB, NULL, "jbc_init, JBUS_PARITY_CONTROL: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

2185

DBG(DBG_CB, NULL, "hvio_intr_gettarget - "

usr/src/uts/sun4u/io/px/px_hlib.c

222

DBG(DBG_CB, NULL, "jbc_init, JBC_FATAL_RESET_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

2228

DBG(DBG_CB, NULL, "hvio_intr_settarget - "

usr/src/uts/sun4u/io/px/px_hlib.c

229

DBG(DBG_CB, NULL,

usr/src/uts/sun4u/io/px/px_hlib.c

236

DBG(DBG_CB, NULL, "jbc_init, JBC_ERROR_LOG_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

239

DBG(DBG_CB, NULL, "jbc_init, JBC_INTERRUPT_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

242

DBG(DBG_CB, NULL, "jbc_init, JBC_INTERRUPT_STATUS: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

245

DBG(DBG_CB, NULL, "jbc_init, JBC_ERROR_STATUS_CLEAR: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

260

DBG(DBG_CB, NULL, "ubc_init, UBC_ERROR_LOG_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

267

DBG(DBG_CB, NULL, "ubc_init, UBC_ERROR_STATUS_CLEAR: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

273

DBG(DBG_CB, NULL, "ubc_init, UBC_ERROR_LOG_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

276

DBG(DBG_CB, NULL, "ubc_init, UBC_INTERRUPT_ENABLE: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

279

DBG(DBG_CB, NULL, "ubc_init, UBC_INTERRUPT_STATUS: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

282

DBG(DBG_CB, NULL, "ubc_init, UBC_ERROR_STATUS_CLEAR: 0x%llx\n",

usr/src/uts/sun4u/io/px/px_hlib.c

2826

DBG(DBG_CB, NULL, "hvio_cb_suspend - unknown chip type: 0x%x\n",

usr/src/uts/sun4u/io/px/px_hlib.c

2878

DBG(DBG_CB, NULL, "hvio_cb_resume - unknown chip type: 0x%x\n",