DBG_ATTACH
PCIEB_DEBUG(DBG_ATTACH, dip, "ddi_intr_get_supported_types"
PCIEB_DEBUG(DBG_ATTACH, dip, "Unable to attach MSI"
PCIEB_DEBUG(DBG_ATTACH, dip,
PCIEB_DEBUG(DBG_ATTACH, dip, "pcieb_intr_init: Attaching %s handler\n",
PCIEB_DEBUG(DBG_ATTACH, dip, "ddi_intr_get_nintrs ret:%d"
PCIEB_DEBUG(DBG_ATTACH, dip, "bdf 0x%x: ddi_intr_get_nintrs: nintrs %d",
PCIEB_DEBUG(DBG_ATTACH, dip, "ddi_intr_alloc() ret: %d ask: %d"
PCIEB_DEBUG(DBG_ATTACH, dip, "bdf 0%x: Requested Intr: %d"
PCIEB_DEBUG(DBG_ATTACH, dip, "ddi_intr_get_pri() ret: %d\n",
PCIEB_DEBUG(DBG_ATTACH, dip, "ddi_intr_set_pri() ret:"
PCIEB_DEBUG(DBG_ATTACH, dip, "Cannot add "
PCIEB_DEBUG(DBG_ATTACH, dip, "MSI number %u in PCIe "
PCIEB_DEBUG(DBG_ATTACH, dip, "MSI number %d in"
PCIEB_DEBUG(DBG_ATTACH, devi, "This is not a switch or"
PCIEB_DEBUG(DBG_ATTACH, devi, "Failed in pcieb_fm_init\n");
PCIEB_DEBUG(DBG_ATTACH, dip, "VID:0x%x DID:0x%x RID:0x%x bdf=0x%x\n",
PCIEB_DEBUG(DBG_ATTACH, dip, "bdf:%x mcheck:%d size:%d "
PCIEB_DEBUG(DBG_ATTACH, dip, "PLX RO Disable : bdf=0x%x port=%d\n",
DBG(DBG_ATTACH, dip, "DDI_ATTACH\n");
DBG(DBG_ATTACH, dip, "attach success\n");
DBG(DBG_ATTACH, dip, "px_lib_dev_fini failed\n");
DBG(DBG_ATTACH, dip, "DDI_RESUME\n");
DBG(DBG_ATTACH, px_p->px_dip,
DBG(DBG_ATTACH, dip, "unsupported attach op\n");
DBG(DBG_ATTACH, dip,
DBG(DBG_ATTACH, dip, "Getting virtual-dma failed\n");
DBG(DBG_ATTACH, dip, "get_px_properties: bus-range (%x,%x)\n",
DEBUG2(DBG_ATTACH, dip, "%s%d hotplug enabled",
DEBUG0(DBG_ATTACH, dip, "DDI_ATTACH\n");
DEBUG0(DBG_ATTACH, dip, "attach success\n");
DEBUG0(DBG_ATTACH, dip, "DDI_RESUME\n");
DEBUG0(DBG_ATTACH, dip, "instance NOT suspended\n");
DEBUG0(DBG_ATTACH, dip, "unsupported attach op\n");
DEBUG0(DBG_ATTACH, dip, "failed - instance not attached\n");
{DBG_ATTACH, "attach"},
DEBUG0(DBG_ATTACH, dip, "ecc_configure: clearing UE and CE errors\n");
DEBUG0(DBG_ATTACH, dip, "ecc_configure: enabling UE CE detection\n");
DEBUG1(DBG_ATTACH, dip, "ecc_create: csr=%x\n", ecc_p->ecc_csr_pa);
DEBUG2(DBG_ATTACH, dip, "ecc_create: ue_afsr=%x, ue_afar=%x\n",
DEBUG2(DBG_ATTACH, dip, "ecc_create: ce_afsr=%x, ce_afar=%x\n",
DEBUG1(DBG_ATTACH, dip, "ib_create: numproxy=%x\n",
DEBUG2(DBG_ATTACH, dip, "ib_create: slot_imr=%x, slot_cir=%x\n",
DEBUG2(DBG_ATTACH, dip, "ib_create: obio_imr=%x, obio_cir=%x\n",
DEBUG2(DBG_ATTACH, dip, "ib_create: upa0_imr=%x, upa1_imr=%x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG2(DBG_ATTACH, dip, "iommu_create: ctrl=%p, tsb=%p\n",
DEBUG2(DBG_ATTACH, dip, "iommu_create: page_flush=%p, ctx_flush=%p\n",
DEBUG2(DBG_ATTACH, dip, "iommu_create: tsb vaddr=%p tsb_paddr=%p\n",
DEBUG1(DBG_ATTACH, dip, "iommu_create: allocated size=%x\n",
DEBUG2(DBG_ATTACH, dip, "iommu_create: fast tsb tte addr: %x + %x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG2(DBG_ATTACH, dip,
DEBUG2(DBG_ATTACH, dip, "iommu_configure: iommu_ctl=%08x.%08x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG3(DBG_ATTACH, dip, "iommu_preserve_tsb: kernel info\n"
DEBUG3(DBG_ATTACH | DBG_CONT, dip, "iommu_preserve_tsb: obp info "
DEBUG0(DBG_ATTACH | DBG_CONT, dip, ".");
DEBUG3(DBG_ATTACH | DBG_CONT, dip,
DEBUG4(DBG_ATTACH, dip,
DEBUG1(DBG_ATTACH, dip, "pbm_create: conf=%x\n",
DEBUG1(DBG_ATTACH, devi,
DEBUG0(DBG_ATTACH, dip, "sc_configure:\n");
DEBUG1(DBG_ATTACH, dip,
DEBUG3(DBG_ATTACH, dip, "sc_create: ctrl=%x, invl=%x, sync=%x\n",
DEBUG2(DBG_ATTACH, dip, "sc_create: ctx_invl=%x ctx_match=%x\n",
DEBUG3(DBG_ATTACH, dip,
DEBUG2(DBG_ATTACH, dip, "sc_create: sync buffer - vaddr=%x paddr=%x\n",
DEBUG1(DBG_ATTACH, dip, "get_pci_properties: numproxy=%d\n",
DEBUG1(DBG_ATTACH, dip, "get_pci_properties: thermal_interrupt=%d\n",
DEBUG2(DBG_ATTACH, dip, "get_pci_properties: bus-range (%x,%x)\n",
DEBUG1(DBG_ATTACH, dip,
DEBUG2(DBG_ATTACH, iommu_p->iommu_pci_p->pci_dip,
DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
DEBUG2(DBG_ATTACH, rdip, "pci_thermal_rem_intr unregistered "
DEBUG3(DBG_ATTACH, dip, "address (%p,%p,%p)\n",
DEBUG2(DBG_ATTACH, dip, "cb_create: ver=%d, mask=%x\n", l, mask);
DEBUG0(DBG_ATTACH, dip, "cb_create: psycho pass 1\n");
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg==%x\n",
DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg==%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n",
DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg==%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg=%x\n", s);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg==%x\n",
DEBUG1(DBG_ATTACH, dip, "cb_create: chip id %d\n", chip_id);
DEBUG1(DBG_ATTACH, dip, "cb_ereport_post: elog 0x%lx",
DEBUG2(DBG_ATTACH, iommu_p->iommu_pci_p->pci_dip,
DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
DEBUG4(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
DEBUG4(DBG_ATTACH, dip, "address (%p,%p,%p,%p)\n",
DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n",
DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg=%x\n", s);
DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s);
DEBUG1(DBG_ATTACH, dip,
DEBUG1(DBG_ATTACH, dip, "pbm_configure: Setting XMITS"
DBG(DBG_ATTACH, NULL, "%s Mask: 0x%llx\n", reg_desc_p->msg,
DBG(DBG_ATTACH, NULL, "%s Status: 0x%llx\n", reg_desc_p->msg,
DBG(DBG_ATTACH, NULL, "%s Clear: 0x%llx\n", reg_desc_p->msg,
DBG(DBG_ATTACH, NULL, "%s Log: 0x%llx\n", reg_desc_p->msg,
DBG(DBG_ATTACH, dip, "px_lib_map_regs: pxu_p:0x%p, dip 0x%p\n",
DBG(DBG_ATTACH, dip, "px_lib_resume: dip 0x%p\n", dip);
DBG(DBG_ATTACH, dip, "reg_bank 0x%x address 0x%p\n",
DBG(DBG_ATTACH, dip, "px_lib_dev_init: dip 0x%p", dip);
DBG(DBG_ATTACH, dip, "px_identity_init: %s%d: "
DBG(DBG_ATTACH, dip, "px_identity_init: %s%d: "
DBG(DBG_ATTACH, dip, "%s%d: Unknown PCI Express Host bridge %s %x\n",
DBG(DBG_ATTACH, dip, "px_lib_dev_init: dev_hdl 0x%llx\n", *dev_hdl);
DBG(DBG_ATTACH, dip, "px_lib_dev_init: dip 0x%p\n", dip);
DBG(DBG_ATTACH, dip, "px_lib_dev_init failed ret=%d\n", ret);
DBG(DBG_ATTACH, dip, "px_lib_suspend: Not supported\n");
DBG(DBG_ATTACH, dip, "px_lib_resume: Not supported\n");
DBG(DBG_ATTACH, dip, "px_lib_dev_init: dev_hdl 0x%llx\n", *dev_hdl);
DBG(DBG_ATTACH, dip, "px_lib_dev_init: "
DBG(DBG_ATTACH, dip, "px_lib_dev_init: negotiated VPCI API version, "
DBG(DBG_ATTACH, dip, "%s: cannot negotiate hypervisor "
DBG(DBG_ATTACH, dip, "px_lib_dev_init: negotiated SDIO API"
DBG(DBG_ATTACH, dip, "%s: cannot negotiate SDIO ERR hypervisor "
DBG(DBG_ATTACH, dip, "px_lib_do_count_waiting_dev: "
DBG(DBG_ATTACH, dip, "px_lib_dev_init: negotiated SDIO ERR API "
DBG(DBG_ATTACH, dip, "Found %d bridges need waiting under RC %p",