ipw2200_csr_put32

usr/src/uts/common/io/iwi/ipw2200.c

1009

ipw2200_csr_put32(sc, IPW2200_CSR_CMD_WRITE_INDEX, sc->sc_cmd_cur);

usr/src/uts/common/io/iwi/ipw2200.c

1169

ipw2200_csr_put32(sc, IPW2200_CSR_INTR_MASK, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1170

ipw2200_csr_put32(sc, IPW2200_CSR_RST, IPW2200_RST_STOP_MASTER);

usr/src/uts/common/io/iwi/ipw2200.c

1186

ipw2200_csr_put32(sc, IPW2200_CSR_RST,

usr/src/uts/common/io/iwi/ipw2200.c

1208

ipw2200_csr_put32(sc, IPW2200_CSR_CTL, tmp | IPW2200_CTL_INIT);

usr/src/uts/common/io/iwi/ipw2200.c

1213

ipw2200_csr_put32(sc, IPW2200_CSR_READ_INT, IPW2200_READ_INT_INIT_HOST);

usr/src/uts/common/io/iwi/ipw2200.c

1231

ipw2200_csr_put32(sc, IPW2200_CSR_RST, tmp | IPW2200_RST_SW_RESET);

usr/src/uts/common/io/iwi/ipw2200.c

1236

ipw2200_csr_put32(sc, IPW2200_CSR_CTL, tmp | IPW2200_CTL_INIT);

usr/src/uts/common/io/iwi/ipw2200.c

1241

ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_ADDR, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1243

ipw2200_csr_put32(sc, IPW2200_CSR_AUTOINC_DATA, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1527

ipw2200_csr_put32(sc, IPW2200_CSR_CMD_BASE, sc->sc_dma_cmdsc.dr_pbase);

usr/src/uts/common/io/iwi/ipw2200.c

1528

ipw2200_csr_put32(sc, IPW2200_CSR_CMD_SIZE, IPW2200_CMD_RING_SIZE);

usr/src/uts/common/io/iwi/ipw2200.c

1529

ipw2200_csr_put32(sc, IPW2200_CSR_CMD_WRITE_INDEX, sc->sc_cmd_cur);

usr/src/uts/common/io/iwi/ipw2200.c

1534

ipw2200_csr_put32(sc, IPW2200_CSR_TX1_BASE, sc->sc_dma_txdsc.dr_pbase);

usr/src/uts/common/io/iwi/ipw2200.c

1535

ipw2200_csr_put32(sc, IPW2200_CSR_TX1_SIZE, IPW2200_TX_RING_SIZE);

usr/src/uts/common/io/iwi/ipw2200.c

1536

ipw2200_csr_put32(sc, IPW2200_CSR_TX1_WRITE_INDEX, sc->sc_tx_cur);

usr/src/uts/common/io/iwi/ipw2200.c

1541

ipw2200_csr_put32(sc, IPW2200_CSR_TX2_BASE, sc->sc_dma_txdsc.dr_pbase);

usr/src/uts/common/io/iwi/ipw2200.c

1542

ipw2200_csr_put32(sc, IPW2200_CSR_TX2_SIZE, IPW2200_TX_RING_SIZE);

usr/src/uts/common/io/iwi/ipw2200.c

1543

ipw2200_csr_put32(sc, IPW2200_CSR_TX2_READ_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1544

ipw2200_csr_put32(sc, IPW2200_CSR_TX2_WRITE_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1545

ipw2200_csr_put32(sc, IPW2200_CSR_TX3_BASE, sc->sc_dma_txdsc.dr_pbase);

usr/src/uts/common/io/iwi/ipw2200.c

1546

ipw2200_csr_put32(sc, IPW2200_CSR_TX3_SIZE, IPW2200_TX_RING_SIZE);

usr/src/uts/common/io/iwi/ipw2200.c

1547

ipw2200_csr_put32(sc, IPW2200_CSR_TX3_READ_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1548

ipw2200_csr_put32(sc, IPW2200_CSR_TX3_WRITE_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1549

ipw2200_csr_put32(sc, IPW2200_CSR_TX4_BASE, sc->sc_dma_txdsc.dr_pbase);

usr/src/uts/common/io/iwi/ipw2200.c

1550

ipw2200_csr_put32(sc, IPW2200_CSR_TX4_SIZE, IPW2200_TX_RING_SIZE);

usr/src/uts/common/io/iwi/ipw2200.c

1551

ipw2200_csr_put32(sc, IPW2200_CSR_TX4_READ_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1552

ipw2200_csr_put32(sc, IPW2200_CSR_TX4_WRITE_INDEX, 0);

usr/src/uts/common/io/iwi/ipw2200.c

1558

ipw2200_csr_put32(sc, IPW2200_CSR_RX_BASE + i * 4,

usr/src/uts/common/io/iwi/ipw2200.c

1563

ipw2200_csr_put32(sc, IPW2200_CSR_RX_WRITE_INDEX,

usr/src/uts/common/io/iwi/ipw2200.c

2342

ipw2200_csr_put32(sc, IPW2200_CSR_TX1_WRITE_INDEX, sc->sc_tx_cur);

usr/src/uts/common/io/iwi/ipw2200.c

2876

ipw2200_csr_put32(sc, IPW2200_CSR_INTR_MASK, 0);

usr/src/uts/common/io/iwi/ipw2200.c

2881

ipw2200_csr_put32(sc, IPW2200_CSR_INTR, ireg);

usr/src/uts/common/io/iwi/ipw2200.c

3013

ipw2200_csr_put32(sc, IPW2200_CSR_RX_WRITE_INDEX,

usr/src/uts/common/io/iwi/ipw2200.c

3050

ipw2200_csr_put32(sc, IPW2200_CSR_INTR_MASK, IPW2200_INTR_MASK_ALL);

usr/src/uts/common/io/iwi/ipw2200.c

757

ipw2200_csr_put32(sc, IPW2200_CSR_RST, IPW2200_RST_SW_RESET);

usr/src/uts/common/io/iwi/ipw2200.c

770

ipw2200_csr_put32(sc, IPW2200_CSR_RST, IPW2200_RST_SW_RESET);