io_op_t
hpi_rxdma_control_status(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
hpi_rxdma_event_mask(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
hpi_status_t hpi_rxdma_control_status(hpi_handle_t handle, io_op_t op_mode,
hpi_status_t hpi_rxdma_event_mask(hpi_handle_t handle, io_op_t op_mode,
hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode, uint8_t channel,
hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
hpi_txdma_mbox_config(hpi_handle_t handle, io_op_t op_mode,
hpi_status_t hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode,
hpi_status_t hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode,
hpi_status_t hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
hpi_status_t hpi_txdma_mbox_config(hpi_handle_t handle, io_op_t op_mode,
npi_espc_eeprom_entry(npi_handle_t handle, io_op_t op, uint32_t addr,
npi_status_t npi_espc_eeprom_entry(npi_handle_t, io_op_t,
npi_fflp_event_mask_config(npi_handle_t handle, io_op_t op_mode,
npi_fflp_event_mask_config(npi_handle_t, io_op_t,
npi_mac_hashtab_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
npi_mac_hostinfo_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
npi_mac_altaddr_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
npi_mac_port_attr(npi_handle_t handle, io_op_t op, uint8_t portn,
npi_status_t npi_mac_hashtab_entry(npi_handle_t, io_op_t,
npi_status_t npi_mac_hostinfo_entry(npi_handle_t, io_op_t,
npi_status_t npi_mac_altaddr_entry(npi_handle_t, io_op_t,
npi_status_t npi_mac_port_attr(npi_handle_t, io_op_t, uint8_t,
npi_rxdma_control_status(npi_handle_t handle, io_op_t op_mode,
npi_rxdma_event_mask(npi_handle_t handle, io_op_t op_mode,
npi_rxdma_event_mask_config(npi_handle_t handle, io_op_t op_mode,
npi_status_t npi_rxdma_control_status(npi_handle_t, io_op_t,
npi_status_t npi_rxdma_event_mask(npi_handle_t, io_op_t,
npi_status_t npi_rxdma_event_mask_config(npi_handle_t, io_op_t,
npi_txc_dma_max_burst(npi_handle_t handle, io_op_t op_mode, uint8_t channel,
npi_txc_control(npi_handle_t handle, io_op_t op_mode,
npi_status_t npi_txc_dma_max_burst(npi_handle_t, io_op_t,
npi_status_t npi_txc_dma_max_burst(npi_handle_t, io_op_t,
npi_status_t npi_txc_control(npi_handle_t, io_op_t,
npi_txdma_control_status(npi_handle_t handle, io_op_t op_mode,
npi_txdma_event_mask(npi_handle_t handle, io_op_t op_mode,
npi_txdma_event_mask_config(npi_handle_t handle, io_op_t op_mode,
npi_txdma_ring_config(npi_handle_t handle, io_op_t op_mode,
npi_txdma_mbox_config(npi_handle_t handle, io_op_t op_mode,
npi_txdma_log_page_config(npi_handle_t handle, io_op_t op_mode,
npi_txdma_log_page_vld_config(npi_handle_t handle, io_op_t op_mode,
npi_status_t npi_txdma_log_page_config(npi_handle_t, io_op_t,
npi_status_t npi_txdma_log_page_vld_config(npi_handle_t, io_op_t,
npi_status_t npi_txdma_control_status(npi_handle_t, io_op_t,
npi_status_t npi_txdma_event_mask(npi_handle_t, io_op_t,
npi_status_t npi_txdma_event_mask_config(npi_handle_t, io_op_t,
npi_status_t npi_txdma_ring_config(npi_handle_t, io_op_t,
npi_status_t npi_txdma_mbox_config(npi_handle_t, io_op_t,
npi_zcp_tt_static_entry(npi_handle_t handle, io_op_t op, uint16_t flow_id,
npi_zcp_tt_dynamic_entry(npi_handle_t handle, io_op_t op, uint16_t flow_id,
npi_zcp_tt_bam_entry(npi_handle_t handle, io_op_t op, uint16_t flow_id,
npi_zcp_tt_cfifo_entry(npi_handle_t handle, io_op_t op, uint8_t portn,
npi_status_t npi_zcp_tt_static_entry(npi_handle_t, io_op_t,
npi_status_t npi_zcp_tt_dynamic_entry(npi_handle_t, io_op_t,
npi_status_t npi_zcp_tt_bam_entry(npi_handle_t, io_op_t,
npi_status_t npi_zcp_tt_cfifo_entry(npi_handle_t, io_op_t,