usr/src/uts/sun4u/sunfire/io/fhc.c

1077

clear_reg = softsp->intr_regs[FHC_UART_INO].clear_reg;

usr/src/uts/sun4u/sunfire/io/fhc.c

1139

mondo_vec_reg = softsp->intr_regs[ino].mapping_reg;

usr/src/uts/sun4u/sunfire/io/fhc.c

1243

fhc_arg->clear_reg = (softsp->intr_regs[ino].clear_reg);

usr/src/uts/sun4u/sunfire/io/fhc.c

1284

*(softsp->intr_regs[ino].clear_reg) = ISM_IDLE;

usr/src/uts/sun4u/sunfire/io/fhc.c

1373

softsp->intr_regs[FHC_UART_INO].mapping_reg;

usr/src/uts/sun4u/sunfire/io/fhc.c

2567

mondo_vec_reg = softsp->intr_regs[i].mapping_reg;

usr/src/uts/sun4u/sunfire/io/fhc.c

2568

intr_state_reg = softsp->intr_regs[i].clear_reg;

usr/src/uts/sun4u/sunfire/io/fhc.c

540

if (*(softsp->intr_regs[i].clear_reg) == 3) {

usr/src/uts/sun4u/sunfire/io/fhc.c

541

*(softsp->intr_regs[i].clear_reg) =

usr/src/uts/sun4u/sunfire/io/fhc.c

545

*(softsp->intr_regs[i].clear_reg);

usr/src/uts/sun4u/sunfire/io/fhc.c

564

*(softsp->intr_regs[i].clear_reg) == 3) {

usr/src/uts/sun4u/sunfire/io/fhc.c

568

*(softsp->intr_regs[i].clear_reg) = ISM_IDLE;

usr/src/uts/sun4u/sunfire/io/fhc.c

573

tmp_reg = *(softsp->intr_regs[i].clear_reg);

usr/src/uts/sun4u/sunfire/io/fhc.c

587

*(softsp->intr_regs[i].mapping_reg) = 0;

usr/src/uts/sun4u/sunfire/io/fhc.c

592

tmp_reg = *(softsp->intr_regs[i].mapping_reg);

usr/src/uts/sun4u/sunfire/io/fhc.c

795

if (softsp->intr_regs[FHC_FANFAIL_INO].mapping_reg) {

usr/src/uts/sun4u/sunfire/io/fhc.c

797

(caddr_t *)&softsp->intr_regs[FHC_FANFAIL_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

799

softsp->intr_regs[FHC_FANFAIL_INO].mapping_reg = NULL;

usr/src/uts/sun4u/sunfire/io/fhc.c

801

if (softsp->intr_regs[FHC_SYS_INO].mapping_reg) {

usr/src/uts/sun4u/sunfire/io/fhc.c

803

(caddr_t *)&softsp->intr_regs[FHC_SYS_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

805

softsp->intr_regs[FHC_SYS_INO].mapping_reg = NULL;

usr/src/uts/sun4u/sunfire/io/fhc.c

807

if (softsp->intr_regs[FHC_UART_INO].mapping_reg) {

usr/src/uts/sun4u/sunfire/io/fhc.c

809

(caddr_t *)&softsp->intr_regs[FHC_UART_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

811

softsp->intr_regs[FHC_UART_INO].mapping_reg = NULL;

usr/src/uts/sun4u/sunfire/io/fhc.c

813

if (softsp->intr_regs[FHC_TOD_INO].mapping_reg) {

usr/src/uts/sun4u/sunfire/io/fhc.c

815

(caddr_t *)&softsp->intr_regs[FHC_TOD_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

817

softsp->intr_regs[FHC_TOD_INO].mapping_reg = NULL;

usr/src/uts/sun4u/sunfire/io/fhc.c

870

(caddr_t *)&softsp->intr_regs[FHC_FANFAIL_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

879

(caddr_t *)&softsp->intr_regs[FHC_SYS_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

888

(caddr_t *)&softsp->intr_regs[FHC_UART_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

897

(caddr_t *)&softsp->intr_regs[FHC_TOD_INO].mapping_reg,

usr/src/uts/sun4u/sunfire/io/fhc.c

907

softsp->intr_regs[i].clear_reg =

usr/src/uts/sun4u/sunfire/io/fhc.c

908

(uint_t *)((char *)(softsp->intr_regs[i].mapping_reg) +

usr/src/uts/sun4u/sunfire/io/fhc.c

912

*(softsp->intr_regs[i].clear_reg) = ISM_IDLE;

usr/src/uts/sun4u/sunfire/sys/fhc.h

916

struct intr_regs intr_regs[FHC_MAX_INO];