intr_ctx
struct intr_ctx *intr_ctx = &qlge->intr_ctx[0];
if (ql_atomic_read_32(&qlge->intr_ctx[0].irq_cnt)) {
ql_disable_completion_interrupt(qlge, intr_ctx->intr);
ql_disable_completion_interrupt(qlge, intr_ctx->intr);
ql_disable_completion_interrupt(qlge, intr_ctx->intr);
ql_enable_completion_interrupt(qlge, intr_ctx->intr);
struct intr_ctx *intr_ctx = &qlge->intr_ctx[0];
ql_atomic_set_32(&intr_ctx->irq_cnt, value);
(ddi_intr_handler_t *)intr_ctx->handler,
intr_ctx++;
ql_atomic_set_32(&intr_ctx->irq_cnt, value);
ql_atomic_set_32(&intr_ctx->irq_cnt, value);
struct intr_ctx *intr_ctx = &qlge->intr_ctx[0];
for (i = 0; i < qlge->intr_cnt; i++, intr_ctx++) {
intr_ctx->intr = i;
intr_ctx->qlge = qlge;
intr_ctx->intr_en_mask =
intr_ctx->intr_dis_mask =
intr_ctx->intr_read_mask =
intr_ctx->handler = ql_isr;
intr_ctx->handler = ql_msix_isr;
intr_ctx->handler = ql_msix_tx_isr;
intr_ctx->handler = ql_msix_isr;
intr_ctx->handler = ql_msix_rx_isr;
for (; i < qlge->rx_ring_count; i++, intr_ctx++) {
intr_ctx->intr = iv;
intr_ctx->qlge = qlge;
intr_ctx->intr_en_mask =
intr_ctx->intr_dis_mask =
intr_ctx->intr_read_mask =
intr_ctx->handler = ql_msix_isr;
intr_ctx->handler = ql_msix_rx_isr;
intr_ctx->intr = 0;
intr_ctx->qlge = qlge;
intr_ctx->intr_en_mask =
intr_ctx->intr_dis_mask =
intr_ctx->intr_read_mask =
intr_ctx->handler = ql_isr;
struct intr_ctx *ctx = qlge->intr_ctx + intr;
struct intr_ctx *ctx = qlge->intr_ctx + intr;
struct intr_ctx *ctx;
ctx = qlge->intr_ctx + intr;
ql_atomic_set_32(&qlge->intr_ctx[i].irq_cnt, value);
ql_atomic_set_32(&qlge->intr_ctx[i].irq_cnt, value);
qede_intr_context_t intr_ctx;
qede_print_intr_ctx(qede_intr_context_t *intr_ctx)
if (qede->intr_ctx.intr_type_in_use &
qede->intr_ctx.
if (qede->intr_ctx.intr_type_in_use &
qede->intr_ctx.
ddi_intr_free(intr_ctx->intr_hdl_array[i]);
intr_ctx->intr_hdl_array = NULL;
if (intr_ctx->intr_hdl_array) {
kmem_free(intr_ctx->intr_hdl_array,
intr_ctx->intr_hdl_array_size);
intr_ctx->intr_hdl_array = NULL;
if (intr_ctx->intr_vect_info) {
kmem_free(intr_ctx->intr_vect_info,
intr_ctx->intr_vect_info_array_size);
intr_ctx->intr_vect_info = NULL;
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
intr_ctx->intr_types_available = type_supported;
intr_ctx->intr_type_in_use = DDI_INTR_TYPE_MSIX;
intr_ctx->intr_vect_supported = num_supported;
if ((num_available < intr_ctx->intr_vect_to_request) &&
intr_ctx->intr_vect_to_request);
intr_ctx->intr_vect_to_request = num_available;
intr_ctx->intr_vect_available = num_available;
num_to_request = intr_ctx->intr_vect_to_request;
intr_ctx->intr_hdl_array_size = num_to_request *
intr_ctx->intr_vect_info_array_size = num_to_request *
intr_ctx->intr_hdl_array = kmem_zalloc(
intr_ctx->intr_hdl_array_size, KM_SLEEP);
intr_ctx->intr_vect_info = kmem_zalloc(
intr_ctx->intr_vect_info_array_size, KM_SLEEP);
intr_ctx->intr_hdl_array,
intr_ctx->intr_vect_allocated = num_to_request;
status = ddi_intr_get_pri(intr_ctx->intr_hdl_array[0],
&intr_ctx->intr_pri);
status = ddi_intr_get_cap(intr_ctx->intr_hdl_array[0],
&intr_ctx->intr_cap);
intr_ctx->intr_mode = ECORE_INT_MODE_MSIX;
vect_info = &qede->intr_ctx.intr_vect_info[num_hwfns];
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
hw_init_params.int_mode = qede->intr_ctx.intr_mode;
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
(qede->intr_ctx.intr_type_in_use == DDI_INTR_TYPE_FIXED)
qede->intr_ctx.intr_vect_allocated,
(qede->intr_ctx.intr_type_in_use == DDI_INTR_TYPE_MSIX)
(qede->intr_ctx.intr_type_in_use == DDI_INTR_TYPE_MSI)
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
MUTEX_DRIVER, DDI_INTR_PRI(intr_ctx->intr_pri));
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
intr_ctx->intr_vect_to_request =
intr_ctx->intr_fp_vector_count = qede->num_fp - qede->num_hwfns;
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
status = ddi_intr_disable(intr_ctx->intr_hdl_array[index]);
atomic_and_32(&intr_ctx->intr_state, ~(1 << index));
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
status = ddi_intr_enable(intr_ctx->intr_hdl_array[index]);
atomic_or_32(&intr_ctx->intr_state, (1 << index));
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
for (i = 0; i < intr_ctx->intr_vect_allocated; i++) {
vect_info = &intr_ctx->intr_vect_info[i];
if (intr_ctx->intr_vect_info[i].handler_added == B_TRUE) {
intr_ctx->intr_hdl_array[i]);
(void) ddi_intr_free(intr_ctx->intr_hdl_array[i]);
intr_ctx->intr_hdl_array[i] = NULL;
qede_intr_context_t *intr_ctx = &qede->intr_ctx;
for (i = 0; i < intr_ctx->intr_vect_allocated; i++) {
vect_info = &intr_ctx->intr_vect_info[i];
intr_ctx->intr_hdl_array[i],
qede_intr_context_t *intr_ctx;
intr_ctx = &qede->intr_ctx;
ASSERT(intr_ctx != NULL);
if (intr_ctx->intr_hdl_array) {
for (i = 0; i < intr_ctx->intr_vect_allocated; i++) {
if (intr_ctx->intr_hdl_array[i]) {
struct intr_ctx intr_ctx[MAX_RX_RINGS];