imr
outl(0, ioaddr + imr);
outl(0, ioaddr + imr);
outl(0, ioaddr + imr);
(caddr_t *)&cpqary3p->imr, (offset_t)I2O_INT_MASK, map_len,
uint32_t *imr;
intr = ddi_get32(cpqary3p->imr_handle, (uint32_t *)cpqary3p->imr);
(uint32_t *)cpqary3p->imr, intr & ~(intr_mask));
(uint32_t *)cpqary3p->imr, (intr | intr_mask));
intr = ddi_get32(cpqary3p->imr_handle, (uint32_t *)cpqary3p->imr);
(uint32_t *)cpqary3p->imr, intr & ~(intr_lockup_mask));
(uint32_t *)cpqary3p->imr, (intr | intr_lockup_mask));
uint32_t imr = smrt_get32(smrt, CISS_I2O_INTERRUPT_MASK);
imr &= ~CISS_IMR_BIT_SIMPLE_INTR_DISABLE;
imr |= CISS_IMR_BIT_SIMPLE_INTR_DISABLE;
smrt_put32(smrt, CISS_I2O_INTERRUPT_MASK, imr);
volatile uint64_t imr;
imr = lddphysio(mr_pa);
if (!IB_INO_INTR_ISON(imr))
if (ib_map_reg_get_cpu(imr) == cpu_id)
volatile uint64_t imr = *imr_p;
if (!IB_INO_INTR_ISON(imr))
*imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id);
imr = *imr_p; /* flush previous write */
volatile uint64_t imr, *imr_p, *state_reg;
imr = *imr_p; /* flush previous write */
*imr_p = ib_get_map_reg(IB_IMR2MONDO(imr), cpu_id);
imr = *imr_p; /* flush previous write */
volatile uint64_t *imr;
imr = upa64s_p->imr[upaport];
mondo = UPA64S_IMR_TO_MONDO(*imr);
if (UPA64S_IMR_TO_CPUID(*imr) == cpuid) {
ddi_put64(upa64s_p->imr_ah[upaport], (uint64_t *)imr, imr_dat);
imr_dat = ddi_get64(upa64s_p->imr_ah[upaport], (uint64_t *)imr);
if (ddi_regs_map_setup(dip, 1, (caddr_t *)&upa64s_p->imr[0],
if (ddi_regs_map_setup(dip, 2, (caddr_t *)&upa64s_p->imr[1],
upaport, upa64s_p->imr[upaport], HI32(imr_data), LO32(imr_data));
ddi_put64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport], imr_data);
imr_data = ddi_get64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport]);
ddi_put64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport], 0);
tmp = ddi_get64(upa64s_p->imr_ah[upaport], upa64s_p->imr[upaport]);
upa64s_p->imr[0]);
upa64s_p->imr[1]);
ddi_put64(upa64s_p->imr_ah[0], upa64s_p->imr[0],
ddi_put64(upa64s_p->imr_ah[1], upa64s_p->imr[1],
tmp = ddi_get64(upa64s_p->imr_ah[0], upa64s_p->imr[0]);
tmp = ddi_get64(upa64s_p->imr_ah[1], upa64s_p->imr[1]);
volatile uint64_t imr;
imr = lddphysio(mr_pa);
if (!PCMU_IB_INO_INTR_ISON(imr))
volatile uint64_t imr = *imr_p;
if (!PCMU_IB_INO_INTR_ISON(imr))
*imr_p = ib_get_map_reg(PCMU_IB_IMR2MONDO(imr), cpu_id);
imr = *imr_p; /* flush previous write */
volatile uint64_t imr, *imr_p, *state_reg;
imr = *imr_p; /* flush previous write */
*imr_p = ib_get_map_reg(PCMU_IB_IMR2MONDO(imr), cpu_id);
imr = *imr_p; /* flush previous write */
#define PCMU_IB_INO_INTR_ISON(imr) ((imr) >> 31)
#define PCMU_IB_IMR2MONDO(imr) ((imr) & \
#define IB_INO_INTR_ISON(imr) ((imr) >> 31)
#define IB_IMR2MONDO(imr) \
((imr) & (COMMON_INTR_MAP_REG_IGN | COMMON_INTR_MAP_REG_INO))
#define UPA64S_IMR_TO_CPUID(imr) (((imr) & IMR_TID) >> IMR_TID_BIT)
#define UPA64S_IMR_TO_MONDO(imr) ((imr) & IMR_MONDO)
#define UPA64S_GET_MAP_REG(mondo, imr) ((mondo) | (imr) | IMR_VALID)
uint64_t *imr[UPA64S_PORTS]; /* Intr mapping reg; treat */