icc
bcc,a,pt %icc, 1f; \
move %icc, EINTR, %o0; \
bcc,pt %icc, 1f; \
be,a,pn %icc, name; \
bcc,a,pt %icc, 1f; \
be,a,pn %icc, name; \
be,a,pn %icc, name; \
bcc,a,pt %icc, 1f; \
move %icc, EINTR, %o0; \
bcc,pt %icc, 1f; \
be,a,pn %icc, name; \
bcc,a,pt %icc, 1f; \
be,a,pn %icc, name; \
be,a,pn %icc, name; \
bnz,a,pt %icc, label1; \
bnz,a,pt %icc, label3; \
bnz,pt %icc, label; /* already disabled */ \
bz,pt %icc, label; \
if (annul && (icc == fba)) { /* fba,a is wierd */
} icc;
icc = (enum icc_type) (pinst.rd & 0xf);
switch (icc) {
case icc:
if ((opf_cc == icc) || (opf_cc == xcc)) {
uint_t psr, icc;
icc = (uint_t)(tstate >> PSR_TSTATE_CC_SHIFT) & PSR_ICC;
psr |= icc;
bne,pt %icc, 1b; \
bne,pt %icc, 1b; \
bnz,a,pn %icc, label##f /* disabled for this op? */ ;\
bnz,a,pt %icc, label2##b ;\
bz,pn %icc, label2##f ;\
bnz,a,pt %icc, label2##b ;\
bz,pn %icc, label2##f ;\
be %icc, label##f ;\
bne,a,pn %icc, trace_ptr_panic; \
be,a,pn %icc, trace_ptr_panic; \
movge %icc, 0, scr1; \
blt %icc, label##2; /* skip flush if FJ-OPL cpus */ \
bl,a %icc, label##1; \
blt %icc, label##2; /* skip flush if FJ-OPL cpus */ \
bl,a %icc, label##1; \
bz,pn %icc, exec_fault ;\
bz,a,pn %icc, label##1 ;\
bz,pn %icc, exec_fault ;\
bz,pn %icc, exec_fault ;\
be,pn %icc, label##1 ;\
bne,a,pn %icc, trace_ptr_panic; \
be,a,pn %icc, trace_ptr_panic; \
movge %icc, 0, scr1; \
movgu %icc, USER_CONTEXT_TYPE, ctxtype; \
movgu %icc, USER_CONTEXT_TYPE, dtagacc; \
movgu %icc, USER_CONTEXT_TYPE, itagacc; \
movgu %icc, USER_CONTEXT_TYPE, ctxtype; \
bz,pn %icc, exec_fault ;\
bz,pn %icc, exec_fault ;\
be,a,pn %icc, label ;\
be,a,pn %icc, label ;\