D8390_P0_RCR
outb(4, eth_nic_base+D8390_P0_RCR);
outb(4 | 0x08, eth_nic_base+D8390_P0_RCR);
outb(0x20, eth_nic_base+D8390_P0_RCR); /* monitor mode */
outb(4, eth_nic_base+D8390_P0_RCR); /* allow rx broadcast frames */
outb(D8390_RCR_MON, eth_nic_base + D8390_P0_RCR);