i40e_hmc_obj_txq
struct i40e_hmc_obj_txq *s)
struct i40e_hmc_obj_txq *s)
{I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 },
{I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) },
{I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) },
{I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) },
struct i40e_hmc_obj_txq *s);
struct i40e_hmc_obj_txq *s);
struct i40e_hmc_obj_txq tctx;
bzero(&tctx, sizeof (struct i40e_hmc_obj_txq));