htole32
( (ex).a_midmag = htole32((((flag) & 0x3f) <<26) | \
facs.Version = htole32(2);
fadt.Facs = htole32(0); /* patched by basl */
fadt.Dsdt = htole32(0); /* patched by basl */
fadt.SmiCommand = htole32(SMI_CMD);
fadt.Pm1aEventBlock = htole32(PM1A_EVT_ADDR);
fadt.Pm1aControlBlock = htole32(PM1A_CNT_ADDR);
fadt.PmTimerBlock = htole32(IO_PMTMR);
fadt.Gpe0Block = htole32(IO_GPE0_BLK);
fadt.Flags = htole32(ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
hpet.Id = htole32(hpet_capabilities);
madt.Address = htole32(BHYVE_ADDRESS_LAPIC);
madt.Flags = htole32(ACPI_MADT_PCAT_COMPAT);
madt_lapic.LapicFlags = htole32(ACPI_MADT_ENABLED);
madt_ioapic.Address = htole32(BHYVE_ADDRESS_IOAPIC);
madt_irq_override.GlobalIrq = htole32(2);
madt_irq_override.GlobalIrq = htole32(SCI_INT);
rsdp.RsdtPhysicalAddress = htole32(0); /* patched by basl */
rsdp.Length = htole32(0); /* patched by basl */
header_le.OemRevision = htole32(oem_revision);
header_le.AslCompilerRevision = htole32(0x20220504);
*le_fwcfg_id_ptr = htole32(*le_fwcfg_id_ptr);
element->entry.cmd_le = htole32(QEMU_LOADER_CMD_ALLOC);
element->entry.alloc.alignment_le = htole32(alignment);
element->entry.cmd_le = htole32(QEMU_LOADER_CMD_ADD_CHECKSUM);
element->entry.add_checksum.off_le = htole32(off);
element->entry.add_checksum.start_le = htole32(start);
element->entry.add_checksum.len_le = htole32(len);
element->entry.cmd_le = htole32(QEMU_LOADER_CMD_ADD_POINTER);
element->entry.add_pointer.off_le = htole32(off);
fwcfg->ppi_address = htole32(TPM_PPI_ADDRESS);
extern uint32_t htole32(uint32_t);
copy = htole32(*val);
uint32_t u32 = htole32((uint32_t)req->sir_write);
test32 = htole32(val32);
ent30->smbe_stlen = htole32(table->stt_offset);
ch->smbch_oemdata = htole32(smbios_chassis_oem);
mem.smbmdev_extspeed = htole32(0);
mem.smbmdev_extclkspeed = htole32(0);
mem.smbmdev_extspeed = htole32(0);
mem.smbmdev_extclkspeed = htole32(0);
mem.smbmdev_extspeed = htole32(smbios_memdevice_extspeed);
mem.smbmdev_extclkspeed = htole32(smbios_memdevice_extclkspeed);
mem.smbmdev_extspeed = htole32(smbios_memdevice_extspeed);
mem.smbmdev_extclkspeed = htole32(smbios_memdevice_extclkspeed);
mem->smbmdev_extsize = htole32(0x123456);
btxle.btx_entry = htole32(btxle.btx_entry);
ex.a_text = htole32(hdr->text);
ex.a_data = htole32(hdr->data);
ex.a_entry = htole32(hdr->entry);
eh.e.e_entry = htole32(hdr->entry);
eh.p[0].p_vaddr = eh.p[0].p_paddr = htole32(hdr->org);
eh.p[0].p_filesz = eh.p[0].p_memsz = htole32(hdr->text);
eh.p[1].p_offset = htole32(le32toh(eh.p[0].p_offset) +
htole32(align(le32toh(eh.p[0].p_paddr) + le32toh(eh.p[0].p_memsz),
eh.p[1].p_filesz = eh.p[1].p_memsz = htole32(hdr->data);
htole32(offsetof(struct elfh, shstrtab)), /* sh_offset */
htole32(sizeof(elfhdr.shstrtab)), /* sh_size */
htole32(SHN_UNDEF), /* sh_link */
htole32(1), /* sh_addralign */
htole32(0xb), /* sh_name */
htole32(SHT_PROGBITS), /* sh_type */
htole32(SHF_EXECINSTR | SHF_ALLOC), /* sh_flags */
htole32(SET_ME), /* sh_addr */
htole32(SET_ME), /* sh_offset */
htole32(SET_ME), /* sh_size */
htole32(SHN_UNDEF), /* sh_link */
htole32(4), /* sh_addralign */
htole32(0x11), /* sh_name */
htole32(SHT_PROGBITS), /* sh_type */
htole32(SHF_ALLOC | SHF_WRITE), /* sh_flags */
htole32(SET_ME), /* sh_addr */
htole32(SET_ME), /* sh_offset */
htole32(SET_ME), /* sh_size */
htole32(SHN_UNDEF), /* sh_link */
htole32(4), /* sh_addralign */
#ifndef htole32
htole32(EV_CURRENT), /* e_version */
htole32(SET_ME), /* e_entry */
htole32(offsetof(struct elfh, p)), /* e_phoff */
htole32(offsetof(struct elfh, sh)), /* e_shoff */
htole32(PT_LOAD), /* p_type */
htole32(sizeof(elfhdr)), /* p_offset */
htole32(SET_ME), /* p_vaddr */
htole32(SET_ME), /* p_paddr */
htole32(SET_ME), /* p_filesz */
htole32(SET_ME), /* p_memsz */
htole32(PF_R | PF_X), /* p_flags */
htole32(0x1000) /* p_align */
htole32(PT_LOAD), /* p_type */
htole32(SET_ME), /* p_offset */
htole32(SET_ME), /* p_vaddr */
htole32(SET_ME), /* p_paddr */
htole32(SET_ME), /* p_filesz */
htole32(SET_ME), /* p_memsz */
htole32(PF_R | PF_W), /* p_flags */
htole32(0x1000) /* p_align */
0, htole32(SHT_NULL), 0, 0, 0, 0, htole32(SHN_UNDEF), 0, 0, 0
htole32(1), /* sh_name */
htole32(SHT_STRTAB), /* sh_type */
#ifndef htole32
ring->desc[i] = htole32(data->dma_data.paddr >> 8);
sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
htole32(data->dma_data.paddr >> 8);
tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
tx->flags = htole32(flags);
desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
desc->segs[i].addr = htole32(IWN_LOADDR(cookie.dmac_laddress));
desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
led.unit = htole32(10000); /* on/off in unit of 100ms */
crit.tempR = htole32(temp);
cmd.binitval = htole32((uint32_t)(val - mod));
cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
cmd.intval[i] = htole32(MIN(maxp, pmgt->intval[i]));
basic->bt3_lookup_table[ 0] = htole32(0xaaaaaaaa); /* Normal */
basic->bt3_lookup_table[ 1] = htole32(0xaaaaaaaa);
basic->bt3_lookup_table[ 2] = htole32(0xaeaaaaaa);
basic->bt3_lookup_table[ 3] = htole32(0xaaaaaaaa);
basic->bt3_lookup_table[ 4] = htole32(0xcc00ff28);
basic->bt3_lookup_table[ 5] = htole32(0x0000aaaa);
basic->bt3_lookup_table[ 6] = htole32(0xcc00aaaa);
basic->bt3_lookup_table[ 7] = htole32(0x0000aaaa);
basic->bt3_lookup_table[ 8] = htole32(0xc0004000);
basic->bt3_lookup_table[ 9] = htole32(0x00004000);
basic->bt3_lookup_table[10] = htole32(0xf0005000);
basic->bt3_lookup_table[11] = htole32(0xf0005000);
txmask = htole32(sc->txchainmask);
sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
tx->flags = htole32(IWN_TX_AUTO_SEQ);
tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
hdr->scan_flags = htole32(IWN_SCAN_PASSIVE2ACTIVE);
chan->flags |= htole32(IWN_CHAN_ACTIVE);
chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
sc->rxon.flags &= ~htole32(IWN_RXON_SHPREAMBLE | IWN_RXON_SHSLOT);
sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
sc->rxon.filter |= htole32(IWN_FILTER_BSS);
sc->rxon.filter |= htole32(IWN_FILTER_BEACON);
node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
#define IWN_BT_KILL_ACK_MASK_DEF htole32(0xffff0000)
#define IWN_BT_KILL_CTS_MASK_DEF htole32(0xffff0000)