C_AFSR_RUE
if (t_afsr & (C_AFSR_UE|C_AFSR_RUE|C_AFSR_TO|C_AFSR_BERR)) {
if (t_afsr & (C_AFSR_UE|C_AFSR_RUE)) {
if (t_afsr & (C_AFSR_UE | C_AFSR_RUE | C_AFSR_EDU | C_AFSR_BERR))
if (afsr & (C_AFSR_UE|C_AFSR_RUE)) {
(afsr & C_AFSR_ALL_ERRS) == C_AFSR_RUE) {
C_AFSR_RUE, "RUE ", ECC_ASYNC_TRAPS, CPU_RUE,
C_AFSR_RUE | C_AFSR_BP | C_AFSR_WBP,
C_AFSR_UE | C_AFSR_RUE | C_AFSR_BP | C_AFSR_WBP | C_AFSR_EDU |
C_AFSR_UMS | C_AFSR_IVPE | C_AFSR_RUE | C_AFSR_BP | \
C_AFSR_UMS | C_AFSR_IVPE | C_AFSR_RUE | C_AFSR_BP | \
C_AFSR_RCE | C_AFSR_RUE)
#define C_AFSR_LEVEL1 (C_AFSR_UE | C_AFSR_RUE | C_AFSR_UCU | C_AFSR_EDU | \
#define C_AFSR_JREQ_ERRS (C_AFSR_RUE | C_AFSR_BP | C_AFSR_WBP | \
C_AFSR_UE | C_AFSR_RUE | C_AFSR_EDU | C_AFSR_BP | \
C_AFSR_UE | C_AFSR_RUE | C_AFSR_EDU | C_AFSR_BP)