C_AFSR_IVU
C_AFSR_IVU, "IVU ", ECC_C_TRAP, CPU_IV,
C_AFSR_UE | C_AFSR_IVU | C_AFSR_EDU | C_AFSR_WDU | C_AFSR_UCU |
C_AFSR_IVU, "IVU ", ECC_C_TRAP,
C_AFSR_UE | C_AFSR_DUE | C_AFSR_IVU | C_AFSR_EDU | C_AFSR_EMU |
C_AFSR_UE | C_AFSR_DUE | C_AFSR_IVU | C_AFSR_EDU | C_AFSR_WDU |
case C_AFSR_IVU:
C_AFSR_CPC | C_AFSR_IVU | C_AFSR_IVC | C_AFSR_DUE | \
C_AFSR_ISAP | C_AFSR_EMU | C_AFSR_IVU | C_AFSR_TO | \
C_AFSR_IVU | C_AFSR_IVC | C_AFSR_DUE)
C_AFSR_WDU | C_AFSR_CPU | C_AFSR_IVU | C_AFSR_TO | \
C_AFSR_CPC | C_AFSR_IVU | C_AFSR_IVC)
#define C_AFSR_ALL_ME_ERRS (C_AFSR_ISAP | C_AFSR_UE | C_AFSR_IVU | \
C_AFSR_IVU | C_AFSR_IVC)
C_AFSR_WDU | C_AFSR_CPU | C_AFSR_IVU | C_AFSR_TO | \