C_AFSR_CE
C_AFSR_CE, "CE ", ECC_C_TRAP, CPU_CE,
C_AFSR_CE | C_AFSR_EDC | C_AFSR_EMC | C_AFSR_WDC | C_AFSR_CPC,
C_AFSR_CE | C_AFSR_IVC | C_AFSR_EDC | C_AFSR_WDC | C_AFSR_UCC |
C_AFSR_CE, "CE ", ECC_C_TRAP,
C_AFSR_CE | C_AFSR_EDC | C_AFSR_EMC | C_AFSR_WDC | C_AFSR_CPC |
C_AFSR_CE | C_AFSR_IVC | C_AFSR_EDC | C_AFSR_EMC | C_AFSR_WDC |
C_AFSR_CE | C_AFSR_IVC | C_AFSR_EDC | C_AFSR_WDC | C_AFSR_CPC |
(C_AFSR_ALL_ERRS | C_AFSR_EXT_ALL_ERRS)) == C_AFSR_CE &&
flt_stat = C_AFSR_CE;
t_afsr_errs = C_AFSR_CE;
synd_code = synd_to_synd_code(synd_status, synd, C_AFSR_CE);
if ((afsr & (C_AFSR_CE|C_AFSR_RCE)) &&
(cpu_flt_in_memory(ch_flt, (afsr & C_AFSR_CE)) ||
if (afsr & (C_AFSR_CE|C_AFSR_EMC)) {
if (cpu_flt_in_memory(ch_flt, (afsr & C_AFSR_CE)) ||
case C_AFSR_CE:
C_AFSR_CE, "CE ", ECC_C_TRAP, CPU_CE,
C_AFSR_CE | C_AFSR_RCE | C_AFSR_EDC | C_AFSR_WDC | C_AFSR_CPC,
C_AFSR_CE,
C_AFSR_CE | C_AFSR_FRC | C_AFSR_EDC | C_AFSR_WDC | C_AFSR_UCC |
case C_AFSR_CE:
~(C_AFSR_CE | C_AFSR_FRC | C_AFSR_RCE | C_AFSR_EMC))
~(C_AFSR_CE | C_AFSR_EMC | C_AFSR_THCE))
~(C_AFSR_CE | C_AFSR_EMC))
#define C_AFSR_MEMORY (C_AFSR_UE | C_AFSR_CE | C_AFSR_FRC | C_AFSR_FRU |\
#define C_AFSR_ESYND_ERRS (C_AFSR_UE | C_AFSR_CE | \
#define C_AFSR_CECC_ERRS (C_AFSR_CE | C_AFSR_EMC | C_AFSR_EDU | \
#define C_AFSR_MEMORY (C_AFSR_UE | C_AFSR_CE | C_AFSR_EMU | C_AFSR_EMC | \
#define C_AFSR_ESYND_ERRS (C_AFSR_UE | C_AFSR_CE | \
#define C_AFSR_CECC_ERRS (C_AFSR_CE | C_AFSR_EMC | C_AFSR_EDU | \
#define C_AFSR_MEMORY (C_AFSR_UE | C_AFSR_CE | C_AFSR_EMU | C_AFSR_EMC)
#define C_AFSR_ESYND_ERRS (C_AFSR_UE | C_AFSR_CE | \
C_AFSR_CE | C_AFSR_RCE | C_AFSR_WBP | C_AFSR_FRC | \
C_AFSR_CE | C_AFSR_RCE | C_AFSR_WBP | C_AFSR_FRC | \