usr/src/uts/sun4u/io/px/px_err.c

1522

(caddr_t)CSR_FR(csr_base, DMCINT_ODCD_ERROR_LOG, ADDRESS);

usr/src/uts/sun4u/io/px/px_err.c

1795

bdf = (pcie_req_id_t)CSR_FR(csr_base, MMU_TRANSLATION_FAULT_STATUS, ID);

usr/src/uts/sun4u/io/px/px_err.c

1825

bdf = (pcie_req_id_t)CSR_FR(csr_base, MMU_TRANSLATION_FAULT_STATUS, ID);

usr/src/uts/sun4u/io/px/px_err.c

1856

bdf = (pcie_req_id_t)CSR_FR(csr_base, MMU_TRANSLATION_FAULT_STATUS, ID);

usr/src/uts/sun4u/io/px/px_hlib.c

2518

*msiq_id = CSR_FR((caddr_t)dev_hdl, PM_PME_MAPPING, EQNUM);

usr/src/uts/sun4u/io/px/px_hlib.c

2521

*msiq_id = CSR_FR((caddr_t)dev_hdl, PME_TO_ACK_MAPPING,

usr/src/uts/sun4u/io/px/px_hlib.c

2525

*msiq_id = CSR_FR((caddr_t)dev_hdl, ERR_COR_MAPPING, EQNUM);

usr/src/uts/sun4u/io/px/px_hlib.c

2528

*msiq_id = CSR_FR((caddr_t)dev_hdl, ERR_NONFATAL_MAPPING,

usr/src/uts/sun4u/io/px/px_hlib.c

2532

*msiq_id = CSR_FR((caddr_t)dev_hdl, ERR_FATAL_MAPPING, EQNUM);

usr/src/uts/sun4u/io/px/px_hlib.c

3020

ltssm_state = CSR_FR(csr_base, LPU_LTSSM_STATUS1, LTSSM_STATE);

usr/src/uts/sun4u/io/px/px_hlib.c

740

link_width = CSR_FR(csr_base, TLU_LINK_STATUS, WIDTH);

usr/src/uts/sun4u/io/px/px_hlib.c

767

max_payload = ((CSR_FR(csr_base, TLU_CONTROL, CONFIG) &

usr/src/uts/sun4u/io/px/px_lib4u.c

2693

link_width = CSR_FR(csr_base, TLU_LINK_STATUS, WIDTH);